passes first tests! Only untested feature: large offset which forces
minimum match length to be >=3. arm_nrv2b_d32.S arm_nrv2e_d32.S committer: jreiser <jreiser> 1140677145 +0000
This commit is contained in:
John Reiser
parent
f3b8c9f34e
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20e4cbfd13
@ -1,4 +1,4 @@
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/* arm_nrv2b_d32.S -- ARM decompressor for NRV2E
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/* arm_nrv2b_d32.S -- ARM decompressor for NRV2B
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This file is part of the UPX executable compressor.
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@ -35,79 +35,93 @@
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#define tmp r3
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#define bits r4
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#define off r5
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#define lr2 r6
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#define g32 r7
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#define g32 r6
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#define wrnk r7 /* 0xd00 M2_MAX_OFFSET before "wrinkle" */
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ucl_nrv2b_decompress_32: .globl ucl_nrv2b_decompress_32
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@ ARM mode (char *src, int len_src, char *dst, int *plen_dst)
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add r1,len,src @ r1= eof_src;
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stmfd sp!,{r1,r2,r3, r4,r5,r6,r7,lr}
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mov bits,#1<<31
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blx hitch_n2b
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hitch_n2b_r:
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ldmfd sp!,{r4,r5,r6,r7,pc}
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get32: @ ARM mode; In: Carry set (unchanged until final adc)
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ldrb bits,[src],#1
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ldrb tmp, [src],#1; orr bits,bits,tmp,lsl #1*8
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ldrb tmp, [src],#1; orr bits,bits,tmp,lsl #2*8
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ldrb tmp, [src],#1; orr bits,bits,tmp,lsl #3*8
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adc bits,bits,bits
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bx lr
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unhitch_n2b:
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/* r12 ("ip") is assumed to be a scratch register. */
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#define GETBIT \
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add bits,bits; beq 1f; 0: \
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.subsection 1; \
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1: blx getb; b 0b; \
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1: blx g32; b 0b; \
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.subsection 0
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#define getnextb(reg) GETBIT; adc reg,reg
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#define jnextb0 GETBIT; bcc
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#define jnextb1 GETBIT; bcs
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.code 16 @ THUMB mode
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ucl_nrv2b_decompress_32: .globl ucl_nrv2b_decompress_32 @ ARM mode
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.type ucl_nrv2b_decompress_32, %function
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/* error = (*)(char const *src, int len_src, char *dst, int *plen_dst) */
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adr r12,1+thumb_nrv2b_d32; bx r12 @ enter THUMB mode
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.code 16 @ THUMB mode
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thumb_nrv2b_d32:
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add r1,len,src @ r1= eof_src;
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push {r1,r2,r3, r4,r5,r6,r7, lr}
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mov bits,#1; neg off,bits @ off= -1 initial condition
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lsl bits,#31 @ 1<<31: refill next time
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mov wrnk,#0xd
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lsl wrnk,#8 @ 0xd00
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adr g32,get32 @ load pc-relative address
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b top_n2b
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eof_n2b:
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pop {r1,r3,r4} @ r1= eof_src; r3= orig_dst; r4= plen_dst
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sub src,r1 @ 0 if src length OK
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sub dst,r3 @ actual dst length
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str dst,[r4]
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sub g32,#get32 - hitch_n2b_r @ g32= &hitch_n2b_r
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bx g32
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hitch_n2b:
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mov g32,lr
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add g32,#get32 - hitch_n2b_r @ g32= &get32
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b top
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pop {r1,r3,r4} @ r1= eof_src; r3= orig_dst; r4= plen_dst
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sub src,r1 @ 0 if actual src length equals expected length
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sub dst,r3 @ actual dst length
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str dst,[r4]
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pop {r4,r5,r6,r7, pc} @ return
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lit_n2b:
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ldrb tmp,[src]; add src,#1
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strb tmp,[dst]; add dst,#1
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ldrb tmp,[src]; add src,#1
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strb tmp,[dst]; add dst,#1
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top_n2b:
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jnextb1 lit_n2b
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jnextb1 lit_n2b
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bl ss11 @ len= offset
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sub len,#3; bcs off_same
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ldrb off,[src]; add src,#1 @ low 8 bits
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lsl len,#8
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orr off,len
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mvn off,off; beq eof_n2b @ off= ~off
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off_same:
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bl ss11 @ len= count -2
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mov tmp,#0xd; lsl tmp,#8
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cmn tmp,len
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mov tmp,#2 @ does not modify Carry
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adc len,tmp @ len += 2+ (0xd00<=offset)
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ldrb tmp,[dst] @ force cacheline allocate
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copy_n2v:
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ldrb tmp,[dst,off]
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strb tmp,[dst]; add dst,#1
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sub len,#1; bne copy_n2b
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b top_n2b
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bl ss11 @ len= encoded offset [2..)
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sub tmp,len,#3 @ set Carry
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mov len,#0 @ Carry unaffected
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blo offprev_n2b @ ss11 returned 2
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lsl tmp,#8
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ldrb off,[src]; add src,#1 @ low 8 bits
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orr off,tmp
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mvn off,off; beq eof_n2b @ off= ~off
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offprev_n2b: @ In: 0==len
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getnextb(len); getnextb(len); bne plus1_n2b @ two bits; 1,2,3 ==> 2,3,4
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bl ss11 @ len= encoded length [2..)
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add len,#2 @ [2..) ==> [4..);
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plus1_n2b:
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add len,#1 @ 1,2,3 ==> 2,3,4; [4..) ==> [5..)
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/* 'cmn': add the inputs, set condition codes, discard the sum */
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cmn off,wrnk; bcs near_n2b @ within M2_MAX_OFFSET
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add len,#1 @ too far away, so minimum match length is 3
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near_n2b:
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ldrb tmp,[dst] @ force cacheline allocate
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copy_n2b:
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ldrb tmp,[dst,off]
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strb tmp,[dst]; add dst,#1
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sub len,#1; bne copy_n2b
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b top_n2b
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ss11:
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mov len,#1 @ the msb
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mov lr2,lr @ save return address
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mov len,#1 @ the msb
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mov r12,lr @ return address; alternate: "push {lr}"
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ss11a:
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getnextb(len)
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jnextb0 ss11a
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mov pc,lr2 @ return
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getnextb(len)
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jnextb0 ss11a
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mov pc,r12 @ return; alternate: "pop {pc}"
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.code 32 @ ARM mode for ease of Carry manipulation
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get32: @ In: Carry set (unchanged until final adcs)
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ldrb bits,[src],#1
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ldrb tmp, [src],#1; orr bits,bits,tmp,lsl #1*8
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ldrb tmp, [src],#1; orr bits,bits,tmp,lsl #2*8
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ldrb tmp, [src],#1; orr bits,bits,tmp,lsl #3*8
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adcs bits,bits,bits @ Set Carry out
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bx lr
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.size ucl_nrv2b_decompress_32, .-ucl_nrv2b_decompress_32
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/*
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vi:ts=8:et:nowrap
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*/
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@ -40,22 +40,6 @@
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#define cnt r1 /* overlaps 'len' while reading an offset */
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ucl_nrv2e_decompress_32: .globl ucl_nrv2e_decompress_32 @ ARM mode
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/* error = (*)(char const *src, int len_src, char *dst, int *plen_dst) */
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add r1,len,src @ r1= eof_src;
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stmfd sp!,{r1,r2,r3, r4,r5,r6,r7,lr}
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blx hitch_n2e
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hitch_n2e_r:
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ldmfd sp!,{r4,r5,r6,r7,pc}
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get32: @ ARM mode; In: Carry set (unchanged until final adcs)
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ldrb bits,[src],#1
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ldrb tmp, [src],#1; orr bits,bits,tmp,lsl #1*8
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ldrb tmp, [src],#1; orr bits,bits,tmp,lsl #2*8
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ldrb tmp, [src],#1; orr bits,bits,tmp,lsl #3*8
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adcs bits,bits,bits @ Set Carry out
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bx lr
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#define GETBIT \
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add bits,bits; beq 1f; 0: \
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.subsection 1; \
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@ -66,27 +50,31 @@ get32: @ ARM mode; In: Carry set (unchanged until final adcs)
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#define jnextb0 GETBIT; bcc
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#define jnextb1 GETBIT; bcs
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.code 16 @ THUMB mode
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eof_n2e:
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pop {r1,r3,r4} @ r1= eof_src; r3= orig_dst; r4= plen_dst
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sub src,r1 @ 0 if actual src length equals expected length
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sub dst,r3 @ actual dst length
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str dst,[r4]
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sub g32,#get32 - hitch_n2e_r @ g32= &hitch_n2e_r
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bx g32
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hitch_n2e:
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mov g32,lr @ return address
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add g32,#get32 - hitch_n2e_r @ g32= &get32
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mov bits,#1; neg off,bits @ off= -1 initial condition
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ucl_nrv2e_decompress_32: .globl ucl_nrv2e_decompress_32 @ ARM mode
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.type ucl_nrv2e_decompress_32, %function
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/* error = (*)(char const *src, int len_src, char *dst, int *plen_dst) */
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adr r12,1+thumb_nrv2e_d32; bx r12 @ enter THUMB mode
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.code 16 @ THUMB mode
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thumb_nrv2e_d32:
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add r1,len,src @ r1= eof_src;
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push {r1,r2,r3, r4,r5,r6,r7, lr}
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mov bits,#1; neg off,bits @ off= -1 initial condition
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lsl bits,#31 @ 1<<31; refill next time
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mov wrnk,#5
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lsl wrnk,#8 @ 0x500
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b top_n2e
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adr g32,get32 @ load pc-relative address
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b top_n2e
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eof_n2e:
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pop {r1,r3,r4} @ r1= eof_src; r3= orig_dst; r4= plen_dst
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sub src,r1 @ 0 if actual src length equals expected length
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sub dst,r3 @ actual dst length
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str dst,[r4]
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pop {r4,r5,r6,r7, pc} @ return
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lit_n2e:
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ldrb tmp,[src]; add src,#1
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strb tmp,[dst]; add dst,#1
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ldrb tmp,[src]; add src,#1
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strb tmp,[dst]; add dst,#1
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top_n2e:
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jnextb1 lit_n2e
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mov cnt,#1; b getoff_n2e
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@ -101,11 +89,11 @@ getoff_n2e:
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sub tmp,cnt,#3 @ set Carry
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mov len,#0 @ Carry unaffected
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blo offprev_n2e @ cnt was 2; tests Carry only
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lsl off,tmp,#8
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ldrb tmp,[src]; add src,#1
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orr off,tmp
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mvn off,off; beq eof_n2e @ off= ~off
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asr off,#1; bcs lenlast_n2e
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lsl tmp,#8
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ldrb off,[src]; add src,#1 @ low 7+1 bits
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orr off,tmp
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mvn off,off; beq eof_n2e @ off= ~off
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asr off,#1; bcs lenlast_n2e
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b lenmore_n2e
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offprev_n2e:
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@ -126,12 +114,23 @@ gotlen_n2e: @ 'cmn': add the inputs, set condition codes, discard the sum
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cmn off,wrnk; bcs near_n2e @ within M2_MAX_OFFSET
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add len,#1 @ too far away, so minimum match length is 3
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near_n2e:
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ldrb tmp,[dst] @ force cacheline allocate
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ldrb tmp,[dst] @ force cacheline allocate
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copy_n2e:
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ldrb tmp,[dst,off]
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strb tmp,[dst]; add dst,#1
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sub len,#1; bne copy_n2e
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b top_n2e
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ldrb tmp,[dst,off]
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strb tmp,[dst]; add dst,#1
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sub len,#1; bne copy_n2e
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b top_n2e
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.code 32 @ ARM mode for ease of Carry manipulation
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get32: @ In: Carry set (unchanged until final adcs)
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ldrb bits,[src],#1
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ldrb tmp, [src],#1; orr bits,bits,tmp,lsl #1*8
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ldrb tmp, [src],#1; orr bits,bits,tmp,lsl #2*8
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ldrb tmp, [src],#1; orr bits,bits,tmp,lsl #3*8
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adcs bits,bits,bits @ Set Carry out
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bx lr
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.size ucl_nrv2e_decompress_32, .-ucl_nrv2e_decompress_32
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/*
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vi:ts=8:et:nowrap
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