Fix some misspellings.

This commit is contained in:
Markus F.X.J. Oberhumer
2017-07-22 12:54:37 +02:00
parent 33dc947c21
commit 69355514c9
12 changed files with 12 additions and 12 deletions
@@ -30,7 +30,7 @@
#include "ppc_regs.h"
// http://refspecs.linuxfoundation.org/ELF/ppc64/PPC-elf64abi.html#STACK
SZ_LINK= 6*8 // (sp,cr,lr, xx,yy,zz) save area per calling convention
SZ_PSAV= 8*8 // for spilling a0-a7 if necesary
SZ_PSAV= 8*8 // for spilling a0-a7 if necessary
retaddr = 2*8 // lr === pc
#define section .section
+1 -1
View File
@@ -373,7 +373,7 @@ umax(unsigned a, unsigned b)
// of lowering the segment limit on %cs as an implementation of "no-execute
// .data". Thus OpenBSD 3.9 puts a gap of 0x20000000 (512 MiB) between the
// origins of .text and .data in each module. So, mapping ET_DYN must "level"
// the excursion in .text and .data of anything which preceeded it,
// the excursion in .text and .data of anything which preceded it,
// then add the new PT_LOAD.
static unsigned long // returns relocation constant
+1 -1
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@@ -160,7 +160,7 @@ L90:
movr sp,a0
stwu sp,-(SZ_FRAME+OVERHEAD)(sp) // allocate this frame
lwz a1,sz_pack2_f_exp(r_exp) // sz_pack2 == #bytes which preceed -2*NBPW(r_exp)
lwz a1,sz_pack2_f_exp(r_exp) // sz_pack2 == #bytes which precede -2*NBPW(r_exp)
add a0,r_ADRU,r_BINFO // &b_info
sub a1,a1,r_BINFO // total_size
+1 -1
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@@ -66,7 +66,7 @@ uncompress:
SZ_DLINE=128 # size of data cache line in Apple G5
/* register assingments for NRV algorithms */
/* register assignments for NRV algorithms */
#define hibit r0 /* holds 0x80000000 during decompress */
#define src a0
+1 -1
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@@ -167,7 +167,7 @@ r_reloc= 32 - 1 # used slot in register save area
std r_ADRU,0(a6) // elfbase
stdu sp,-(SZ_FRAME+OVERHEAD)(sp) // allocate this frame
lwz a1,sz_pack2_f_exp(r_exp) // sz_pack2 == #bytes which preceed -2*NBPW(r_exp)
lwz a1,sz_pack2_f_exp(r_exp) // sz_pack2 == #bytes which precede -2*NBPW(r_exp)
add a0,r_ADRU,r_BINFO // &b_info
sub a1,a1,r_BINFO // total_size
@@ -66,7 +66,7 @@ uncompress:
SZ_DLINE=128 # size of data cache line in Apple G5
/* register assingments for NRV algorithms */
/* register assignments for NRV algorithms */
#define hibit r0 /* holds 0x80000000 during decompress */
#define src a0
+1 -1
View File
@@ -346,7 +346,7 @@ static int readelfheaderident(int fd, Elf32_Ehdr *ehdr)
do_reverse_endian = 0;
}
#else
#error unkown endianness
#error unknown endianness
#endif
else {
err("Unsupported endianness");