Consistently use .arch nojumps on i086 and i386.

This commit is contained in:
Markus F.X.J. Oberhumer
2007-01-09 22:40:01 +01:00
parent a7ca0fec88
commit a354f18a2d
42 changed files with 2001 additions and 2008 deletions
+9 -9
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@@ -29,8 +29,8 @@
#define STUB_I086_DOS16_COM_SIZE 6080 #define STUB_I086_DOS16_COM_SIZE 6080
#define STUB_I086_DOS16_COM_ADLER32 0xa2eb419f #define STUB_I086_DOS16_COM_ADLER32 0x8b03419f
#define STUB_I086_DOS16_COM_CRC32 0x4455eb6c #define STUB_I086_DOS16_COM_CRC32 0xe4b9c118
unsigned char stub_i086_dos16_com[6080] = { unsigned char stub_i086_dos16_com[6080] = {
127, 69, 76, 70, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* 0x 0 */ 127, 69, 76, 70, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* 0x 0 */
@@ -359,14 +359,14 @@ unsigned char stub_i086_dos16_com[6080] = {
67, 79, 82, 68, 83, 32, 70, 79, 82, 32, 91, 78, 82, 86, 68, 69, /* 0x1430 */ 67, 79, 82, 68, 83, 32, 70, 79, 82, 32, 91, 78, 82, 86, 68, 69, /* 0x1430 */
67, 79, 49, 93, 58, 10, 79, 70, 70, 83, 69, 84, 32, 32, 32, 84, /* 0x1440 */ 67, 79, 49, 93, 58, 10, 79, 70, 70, 83, 69, 84, 32, 32, 32, 84, /* 0x1440 */
89, 80, 69, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, /* 0x1450 */ 89, 80, 69, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, /* 0x1450 */
32, 86, 65, 76, 85, 69, 10, 48, 48, 48, 48, 48, 48, 49, 48, 32, /* 0x1460 */ 32, 86, 65, 76, 85, 69, 10, 48, 48, 48, 48, 48, 48, 48, 49, 32, /* 0x1460 */
82, 95, 51, 56, 54, 95, 80, 67, 49, 54, 32, 32, 32, 32, 32, 32, /* 0x1470 */ 82, 95, 51, 56, 54, 95, 80, 67, 56, 32, 32, 32, 32, 32, 32, 32, /* 0x1470 */
32, 32, 78, 82, 86, 68, 69, 67, 79, 50, 10, 48, 48, 48, 48, 48, /* 0x1480 */ 32, 32, 78, 82, 86, 50, 66, 49, 54, 48, 10, 48, 48, 48, 48, 48, /* 0x1480 */
48, 49, 56, 32, 82, 95, 51, 56, 54, 95, 80, 67, 49, 54, 32, 32, /* 0x1490 */ 48, 49, 48, 32, 82, 95, 51, 56, 54, 95, 80, 67, 49, 54, 32, 32, /* 0x1490 */
32, 32, 32, 32, 32, 32, 78, 82, 86, 68, 69, 67, 79, 50, 10, 48, /* 0x14a0 */ 32, 32, 32, 32, 32, 32, 78, 82, 86, 68, 69, 67, 79, 50, 10, 48, /* 0x14a0 */
48, 48, 48, 48, 48, 48, 49, 32, 82, 95, 51, 56, 54, 95, 80, 67, /* 0x14b0 */ 48, 48, 48, 48, 48, 49, 56, 32, 82, 95, 51, 56, 54, 95, 80, 67, /* 0x14b0 */
56, 32, 32, 32, 32, 32, 32, 32, 32, 32, 78, 82, 86, 50, 66, 49, /* 0x14c0 */ 49, 54, 32, 32, 32, 32, 32, 32, 32, 32, 78, 82, 86, 68, 69, 67, /* 0x14c0 */
54, 48, 10, 10, 82, 69, 76, 79, 67, 65, 84, 73, 79, 78, 32, 82, /* 0x14d0 */ 79, 50, 10, 10, 82, 69, 76, 79, 67, 65, 84, 73, 79, 78, 32, 82, /* 0x14d0 */
69, 67, 79, 82, 68, 83, 32, 70, 79, 82, 32, 91, 78, 82, 86, 68, /* 0x14e0 */ 69, 67, 79, 82, 68, 83, 32, 70, 79, 82, 32, 91, 78, 82, 86, 68, /* 0x14e0 */
69, 67, 79, 50, 93, 58, 10, 79, 70, 70, 83, 69, 84, 32, 32, 32, /* 0x14f0 */ 69, 67, 79, 50, 93, 58, 10, 79, 70, 70, 83, 69, 84, 32, 32, 32, /* 0x14f0 */
84, 89, 80, 69, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, /* 0x1500 */ 84, 89, 80, 69, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, /* 0x1500 */
+8 -8
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@@ -29,8 +29,8 @@
#define STUB_I086_DOS16_SYS_SIZE 7014 #define STUB_I086_DOS16_SYS_SIZE 7014
#define STUB_I086_DOS16_SYS_ADLER32 0xb53112a7 #define STUB_I086_DOS16_SYS_ADLER32 0x9d4912a7
#define STUB_I086_DOS16_SYS_CRC32 0xc46d7d1b #define STUB_I086_DOS16_SYS_CRC32 0xf0c5326f
unsigned char stub_i086_dos16_sys[7014] = { unsigned char stub_i086_dos16_sys[7014] = {
127, 69, 76, 70, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* 0x 0 */ 127, 69, 76, 70, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* 0x 0 */
@@ -411,13 +411,13 @@ unsigned char stub_i086_dos16_sys[7014] = {
82, 86, 68, 69, 67, 79, 49, 93, 58, 10, 79, 70, 70, 83, 69, 84, /* 0x1770 */ 82, 86, 68, 69, 67, 79, 49, 93, 58, 10, 79, 70, 70, 83, 69, 84, /* 0x1770 */
32, 32, 32, 84, 89, 80, 69, 32, 32, 32, 32, 32, 32, 32, 32, 32, /* 0x1780 */ 32, 32, 32, 84, 89, 80, 69, 32, 32, 32, 32, 32, 32, 32, 32, 32, /* 0x1780 */
32, 32, 32, 32, 32, 86, 65, 76, 85, 69, 10, 48, 48, 48, 48, 48, /* 0x1790 */ 32, 32, 32, 32, 32, 86, 65, 76, 85, 69, 10, 48, 48, 48, 48, 48, /* 0x1790 */
48, 49, 48, 32, 82, 95, 51, 56, 54, 95, 80, 67, 49, 54, 32, 32, /* 0x17a0 */ 48, 48, 49, 32, 82, 95, 51, 56, 54, 95, 80, 67, 56, 32, 32, 32, /* 0x17a0 */
32, 32, 32, 32, 32, 32, 78, 82, 86, 68, 69, 67, 79, 50, 10, 48, /* 0x17b0 */ 32, 32, 32, 32, 32, 32, 78, 82, 86, 50, 66, 49, 54, 48, 10, 48, /* 0x17b0 */
48, 48, 48, 48, 48, 49, 56, 32, 82, 95, 51, 56, 54, 95, 80, 67, /* 0x17c0 */ 48, 48, 48, 48, 48, 49, 48, 32, 82, 95, 51, 56, 54, 95, 80, 67, /* 0x17c0 */
49, 54, 32, 32, 32, 32, 32, 32, 32, 32, 78, 82, 86, 68, 69, 67, /* 0x17d0 */ 49, 54, 32, 32, 32, 32, 32, 32, 32, 32, 78, 82, 86, 68, 69, 67, /* 0x17d0 */
79, 50, 10, 48, 48, 48, 48, 48, 48, 48, 49, 32, 82, 95, 51, 56, /* 0x17e0 */ 79, 50, 10, 48, 48, 48, 48, 48, 48, 49, 56, 32, 82, 95, 51, 56, /* 0x17e0 */
54, 95, 80, 67, 56, 32, 32, 32, 32, 32, 32, 32, 32, 32, 78, 82, /* 0x17f0 */ 54, 95, 80, 67, 49, 54, 32, 32, 32, 32, 32, 32, 32, 32, 78, 82, /* 0x17f0 */
86, 50, 66, 49, 54, 48, 10, 10, 82, 69, 76, 79, 67, 65, 84, 73, /* 0x1800 */ 86, 68, 69, 67, 79, 50, 10, 10, 82, 69, 76, 79, 67, 65, 84, 73, /* 0x1800 */
79, 78, 32, 82, 69, 67, 79, 82, 68, 83, 32, 70, 79, 82, 32, 91, /* 0x1810 */ 79, 78, 32, 82, 69, 67, 79, 82, 68, 83, 32, 70, 79, 82, 32, 91, /* 0x1810 */
78, 82, 86, 68, 69, 67, 79, 50, 93, 58, 10, 79, 70, 70, 83, 69, /* 0x1820 */ 78, 82, 86, 68, 69, 67, 79, 50, 93, 58, 10, 79, 70, 70, 83, 69, /* 0x1820 */
84, 32, 32, 32, 84, 89, 80, 69, 32, 32, 32, 32, 32, 32, 32, 32, /* 0x1830 */ 84, 32, 32, 32, 84, 89, 80, 69, 32, 32, 32, 32, 32, 32, 32, 32, /* 0x1830 */
+7 -7
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@@ -29,8 +29,8 @@
#define STUB_I386_LINUX_ELF_INTERP_ENTRY_SIZE 45295 #define STUB_I386_LINUX_ELF_INTERP_ENTRY_SIZE 45295
#define STUB_I386_LINUX_ELF_INTERP_ENTRY_ADLER32 0xbb052be1 #define STUB_I386_LINUX_ELF_INTERP_ENTRY_ADLER32 0xbfcd2be1
#define STUB_I386_LINUX_ELF_INTERP_ENTRY_CRC32 0x3a67277f #define STUB_I386_LINUX_ELF_INTERP_ENTRY_CRC32 0x587a45f6
unsigned char stub_i386_linux_elf_interp_entry[45295] = { unsigned char stub_i386_linux_elf_interp_entry[45295] = {
127, 69, 76, 70, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* 0x 0 */ 127, 69, 76, 70, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* 0x 0 */
@@ -2546,11 +2546,11 @@ unsigned char stub_i386_linux_elf_interp_entry[45295] = {
32, 86, 65, 76, 85, 69, 10, 48, 48, 48, 48, 48, 48, 48, 54, 32, /* 0x9ce0 */ 32, 86, 65, 76, 85, 69, 10, 48, 48, 48, 48, 48, 48, 48, 54, 32, /* 0x9ce0 */
82, 95, 51, 56, 54, 95, 80, 67, 56, 32, 32, 32, 32, 32, 32, 32, /* 0x9cf0 */ 82, 95, 51, 56, 54, 95, 80, 67, 56, 32, 32, 32, 32, 32, 32, 32, /* 0x9cf0 */
32, 32, 67, 76, 49, 84, 79, 80, 48, 55, 10, 48, 48, 48, 48, 48, /* 0x9d00 */ 32, 32, 67, 76, 49, 84, 79, 80, 48, 55, 10, 48, 48, 48, 48, 48, /* 0x9d00 */
48, 49, 48, 32, 82, 95, 51, 56, 54, 95, 80, 67, 56, 32, 32, 32, /* 0x9d10 */ 48, 48, 97, 32, 82, 95, 51, 56, 54, 95, 80, 67, 56, 32, 32, 32, /* 0x9d10 */
32, 32, 32, 32, 32, 32, 67, 76, 49, 84, 79, 80, 48, 55, 10, 48, /* 0x9d20 */ 32, 32, 32, 32, 32, 32, 67, 76, 49, 87, 73, 68, 48, 56, 10, 48, /* 0x9d20 */
48, 48, 48, 48, 48, 48, 97, 32, 82, 95, 51, 56, 54, 95, 80, 67, /* 0x9d30 */ 48, 48, 48, 48, 48, 49, 48, 32, 82, 95, 51, 56, 54, 95, 80, 67, /* 0x9d30 */
56, 32, 32, 32, 32, 32, 32, 32, 32, 32, 67, 76, 49, 87, 73, 68, /* 0x9d40 */ 56, 32, 32, 32, 32, 32, 32, 32, 32, 32, 67, 76, 49, 84, 79, 80, /* 0x9d40 */
48, 56, 10, 10, 82, 69, 76, 79, 67, 65, 84, 73, 79, 78, 32, 82, /* 0x9d50 */ 48, 55, 10, 10, 82, 69, 76, 79, 67, 65, 84, 73, 79, 78, 32, 82, /* 0x9d50 */
69, 67, 79, 82, 68, 83, 32, 70, 79, 82, 32, 91, 67, 76, 49, 84, /* 0x9d60 */ 69, 67, 79, 82, 68, 83, 32, 70, 79, 82, 32, 91, 67, 76, 49, 84, /* 0x9d60 */
79, 80, 48, 49, 93, 58, 10, 79, 70, 70, 83, 69, 84, 32, 32, 32, /* 0x9d70 */ 79, 80, 48, 49, 93, 58, 10, 79, 70, 70, 83, 69, 84, 32, 32, 32, /* 0x9d70 */
84, 89, 80, 69, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, /* 0x9d80 */ 84, 89, 80, 69, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, /* 0x9d80 */
File diff suppressed because it is too large Load Diff
+1 -1
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@@ -33,7 +33,7 @@
#undef i586 #undef i586
#undef x86_64 #undef x86_64
//.altmacro // not supported by x86_64-linux-as //.altmacro // not supported by x86_64-linux-as-2.15
.code64 .code64
.macro section name .macro section name
+7 -4
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@@ -35,7 +35,7 @@
.altmacro .altmacro
.intel_syntax noprefix .intel_syntax noprefix
.arch i8086, nojumps .arch i8086, jumps
.code16 .code16
.macro section name .macro section name
@@ -43,13 +43,12 @@
.code16 .code16
.endm .endm
.macro CPU id .macro CPU id
.ifc \id, 8086 .ifc \id, 8086
.arch i8086, nojumps .arch i8086, jumps
.endif .endif
.ifc \id, 286 .ifc \id, 286
.arch i286, nojumps .arch i286, jumps
.endif .endif
.endm .endm
@@ -121,9 +120,13 @@
.byte 0x7f, \target - . - 1 .byte 0x7f, \target - . - 1
.endm .endm
#define jbes jnas
#define jbs jcs
#define jes jzs #define jes jzs
#define jnbs jncs
#define jnes jnzs #define jnes jnzs
/* /*
; ============= ; =============
; ============= 16-BIT CALLTRICK & JUMPTRICK ; ============= 16-BIT CALLTRICK & JUMPTRICK
+3 -3
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@@ -52,9 +52,9 @@ section NRVDDONE
section NRVDRETU section NRVDRETU
jcxz decomp_ret_n2b jcxz decomp_ret_n2b
section NRVDECO1 section NRVDECO1
jnb loop1_n2b jnbs loop1_n2b
sub cx, 3 sub cx, 3
jb axbp_n2b jbs axbp_n2b
mov ah, cl mov ah, cl
lodsb lodsb
not ax not ax
@@ -67,7 +67,7 @@ axbp_n2b:
inc cx inc cx
loop2_n2b: loop2_n2b:
call getbit_cx_n2b call getbit_cx_n2b
jnb loop2_n2b jnbs loop2_n2b
inc cx inc cx
inc cx inc cx
copy_match_n2b: copy_match_n2b:
+1 -1
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@@ -96,7 +96,7 @@ copy_match_n2b:
sbb cx, -2 sbb cx, -2
sub ax, bp sub ax, bp
jb handle_underflow_n2b jbs handle_underflow_n2b
mov ds, ax mov ds, ax
lea ax, [bx + di] lea ax, [bx + di]
ds_ok_n2b: ds_ok_n2b:
+1 -1
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@@ -106,7 +106,7 @@ copy_match_n2d:
sbb cx, -2 sbb cx, -2
sub ax, bp sub ax, bp
jb handle_underflow_n2d jbs handle_underflow_n2d
mov ds, ax mov ds, ax
lea ax, [bx + di] lea ax, [bx + di]
ds_ok_n2d: ds_ok_n2d:
+1 -1
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@@ -110,7 +110,7 @@ copy_match_n2e:
sbb cx, -3 sbb cx, -3
sub ax, bp sub ax, bp
jb handle_underflow_n2e jbs handle_underflow_n2e
mov ds, ax mov ds, ax
lea ax, [bx + di] lea ax, [bx + di]
ds_ok_n2e: ds_ok_n2e:
+23 -23
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@@ -45,7 +45,7 @@ section CL1SMA1B
call edx call edx
section CL1FAS1B section CL1FAS1B
add ebx, ebx add ebx, ebx
jnz 1f jnzs 1f
call edx call edx
1: 1:
section CL1GET1B section CL1GET1B
@@ -56,7 +56,7 @@ section CL1ENTER
section CL1SMA10 section CL1SMA10
getbit_cl1: // appears only in small version getbit_cl1: // appears only in small version
add ebx, ebx add ebx, ebx
jz reload_cl1 jzs reload_cl1
ret ret
section CL1RLOAD section CL1RLOAD
reload_cl1: // for both small and fast version reload_cl1: // for both small and fast version
@@ -72,13 +72,13 @@ section CL1WID02
adc ecx,ecx adc ecx,ecx
// getbit // getbit
section CL1WID03 section CL1WID03
jc lit89_cl1 jcs lit89_cl1
// getbit // getbit
section CL1WID04 section CL1WID04
adc ecx,ecx adc ecx,ecx
// getbit // getbit
section CL1WID05 section CL1WID05
jc lit10_12_cl1 jcs lit10_12_cl1
// getbit // getbit
section CL1WID06 section CL1WID06
adc ecx,ecx // 0..7; -1+ (width/2) of length adc ecx,ecx // 0..7; -1+ (width/2) of length
@@ -91,13 +91,13 @@ section CL1WID07
section CL1WID08 section CL1WID08
adc eax,eax adc eax,eax
sub ecx, 1 sub ecx, 1
jnc litwidth_cl1 jncs litwidth_cl1
lea ecx,[17 -2 + eax] // 17: predecessors; ss22 returns 2.. lea ecx,[17 -2 + eax] // 17: predecessors; ss22 returns 2..
cmp eax,0xffff-(17 -2) cmp eax,0xffff-(17 -2)
jb litgo_cl1 // not maximal range of search jbs litgo_cl1 // not maximal range of search
lea eax,[esi + ecx] // esi after copy lea eax,[esi + ecx] // esi after copy
push eax // "parameter" to maxlit_cl1 push eax // "parameter" to maxlit_cl1
jmp maxlit_cl1 // can have another literal afterwards jmp maxlit_cl1 // can have another literal afterwards
lit13_16_cl1: lit13_16_cl1:
// getbit // getbit
section CL1WID09 section CL1WID09
@@ -109,7 +109,7 @@ section CL1WID10
jmps litmov_cl1 jmps litmov_cl1
lit10_12_cl1: lit10_12_cl1:
test ecx,ecx test ecx,ecx
jz lit13_16_cl1 jzs lit13_16_cl1
inc ecx // 2,3,4 inc ecx // 2,3,4
lit89_cl1: lit89_cl1:
add ecx, 8 add ecx, 8
@@ -126,24 +126,24 @@ top_cl1: // In: 0==ecx
lea eax,[1+ ecx] // 1: the msb of offset or large width lea eax,[1+ ecx] // 1: the msb of offset or large width
// getbit // getbit
section CL1TOP01 section CL1TOP01
jnc match_cl1 jncs match_cl1
// getbit // getbit
section CL1TOP02 section CL1TOP02
jc lit1_cl1 jcs lit1_cl1
// getbit // getbit
section CL1TOP03 section CL1TOP03
jc lit2_cl1 jcs lit2_cl1
// getbit // getbit
section CL1TOP04 section CL1TOP04
jc lit3_cl1 jcs lit3_cl1
add ecx, 2 add ecx, 2
// getbit // getbit
section CL1TOP05 section CL1TOP05
jc lit45_cl1 jcs lit45_cl1
inc ecx inc ecx
// getbit // getbit
section CL1TOP06 section CL1TOP06
jc lit67_cl1 jcs lit67_cl1
jmp widelit_cl1 jmp widelit_cl1
lit67_cl1: lit67_cl1:
lit45_cl1: lit45_cl1:
@@ -152,11 +152,11 @@ section CL1TOP07
adc ecx,ecx adc ecx,ecx
litmov_cl1: litmov_cl1:
.byte 0xD1,((3<<6)|(5<<3)|1) //shr ecx,1 .byte 0xD1,((3<<6)|(5<<3)|1) //shr ecx,1
jnc litmovb_cl1 jncs litmovb_cl1
movsb movsb
litmovb_cl1: litmovb_cl1:
.byte 0xD1,((3<<6)|(5<<3)|1) //shr ecx,1 .byte 0xD1,((3<<6)|(5<<3)|1) //shr ecx,1
jnc litmovw_cl1 jncs litmovw_cl1
movsw movsw
litmovw_cl1: litmovw_cl1:
rep rep
@@ -179,13 +179,13 @@ section CL1OFF01
adc eax,eax adc eax,eax
// getbit // getbit
section CL1OFF02 section CL1OFF02
jnc offset_cl1 jncs offset_cl1
sub eax, 3 // 2.. ==> -1[prev], (0,,<<8)|byte sub eax, 3 // 2.. ==> -1[prev], (0,,<<8)|byte
jc prev_off_cl1 jcs prev_off_cl1
shl eax,8 shl eax,8
lodsb lodsb
xor eax, ~0 xor eax, ~0
jz done_cl1 // EOF jzs done_cl1 // EOF
mov ebp,eax // -offset mov ebp,eax // -offset
prev_off_cl1: // 1st 2 bits encode (5<=len),2,3,4 prev_off_cl1: // 1st 2 bits encode (5<=len),2,3,4
// getbit // getbit
@@ -194,7 +194,7 @@ section CL1OFF03
// getbit // getbit
section CL1OFF04 section CL1OFF04
adc ecx,ecx adc ecx,ecx
jnz wrinkle_cl1 jnzs wrinkle_cl1
section CL1LEN00 section CL1LEN00
inc ecx // 1: the msb inc ecx // 1: the msb
mlen_cl1: mlen_cl1:
@@ -203,7 +203,7 @@ section CL1LEN01
adc ecx,ecx adc ecx,ecx
// getbit // getbit
section CL1LEN02 section CL1LEN02
jnc mlen_cl1 jncs mlen_cl1
add ecx, 2 // 2.. ==> 4.. add ecx, 2 // 2.. ==> 4..
section CL1COPY0 section CL1COPY0
wrinkle_cl1: wrinkle_cl1:
@@ -216,11 +216,11 @@ copy_cl1:
ja ripple_cl1 ja ripple_cl1
maxlit_cl1: // literal copy cannot overlap; omit test for ripple maxlit_cl1: // literal copy cannot overlap; omit test for ripple
.byte 0xD1,((3<<6)|(5<<3)|1) //shr ecx,1 .byte 0xD1,((3<<6)|(5<<3)|1) //shr ecx,1
jnc maxlitb_cl1 jncs maxlitb_cl1
movsb movsb
maxlitb_cl1: maxlitb_cl1:
.byte 0xD1,((3<<6)|(5<<3)|1) //shr ecx,1 .byte 0xD1,((3<<6)|(5<<3)|1) //shr ecx,1
jnc maxlitw_cl1 jncs maxlitw_cl1
movsw movsw
maxlitw_cl1: maxlitw_cl1:
rep rep
+18 -15
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@@ -35,8 +35,7 @@
.altmacro .altmacro
.intel_syntax noprefix .intel_syntax noprefix
// FIXME: enabing this causes stub changes ??? .arch i386, jumps
//.arch i386, nojumps
.code32 .code32
.macro section name .macro section name
@@ -46,11 +45,10 @@
.macro CPU id .macro CPU id
.ifc \id, 386 .ifc \id, 386
// FIXME: enabing this causes stub changes ??? .arch i386, jumps
//.arch i386, nojumps
.endif .endif
.ifc \id, 486 .ifc \id, 486
.arch i486, nojumps .arch i486, jumps
.endif .endif
.endm .endm
@@ -122,9 +120,12 @@
.byte 0x7f, \target - . - 1 .byte 0x7f, \target - . - 1
.endm .endm
#define jes jzs
#define jnes jnzs
#define jbes jnas #define jbes jnas
#define jbs jcs
#define jes jzs
#define jnbs jncs
#define jnes jnzs
/* /*
;; ============= ;; =============
@@ -473,10 +474,10 @@ section LXMRU046 // 0==n_mru
sub ebp, ebx sub ebp, ebx
section LXJCC020 // 0==n_mru, or Jcc excluded ('sub' of equals clears Carry) section LXJCC020 // 0==n_mru, or Jcc excluded ('sub' of equals clears Carry)
jne unfcount jnes unfcount
section LXJCC021 // 0!=n_mru and Jcc participates// must set Carry section LXJCC021 // 0!=n_mru and Jcc participates// must set Carry
sub ebp, 1 // set Carry iff in range sub ebp, 1 // set Carry iff in range
jnb unfcount jnbs unfcount
section LXJCC023 // found Jcc// re-swap 0x8Y opcode and 0x0f prefix section LXJCC023 // found Jcc// re-swap 0x8Y opcode and 0x0f prefix
mov [edi -1], bl // 0x0f prefix mov [edi -1], bl // 0x0f prefix
@@ -509,8 +510,10 @@ section LXUNF487 // 0!=n_mru && >=486
jncs unf_store // do not apply mru jncs unf_store // do not apply mru
section LXMRU065 // 0!=n_mru section LXMRU065 // 0!=n_mru
CPU 486 // (use faster but longer shr opcode sequence)
shr __jc, 1 // eax= jc, or mru index shr __jc, 1 // eax= jc, or mru index
jnc mru4 // not 1st time for this jc CPU 386
jncs mru4 // not 1st time for this jc
section MRUBYTE3 section MRUBYTE3
dec __hand_l dec __hand_l
section MRUARB30 section MRUARB30
@@ -655,20 +658,20 @@ section LXCALJMP
// only CALL, or only JMP, is filtered // only CALL, or only JMP, is filtered
section LXCALL00 // 0==n_mru section LXCALL00 // 0==n_mru
je lxunf jes lxunf
section LXCALL01 // 0!=n_rmu section LXCALL01 // 0!=n_rmu
sub eax, 1 // set Carry iff in range sub eax, 1 // set Carry iff in range
section LXCJ2MRU // 0==n_mru, or apply mru to all that are filtered here section LXCJ2MRU // 0==n_mru, or apply mru to all that are filtered here
jb lxunf // only Carry (Borrow) matters jbs lxunf // only Carry (Borrow) matters
section LXCJ4MRU // 0!=n_mru, but apply mru only to subset of filtered here section LXCJ4MRU // 0!=n_mru, but apply mru only to subset of filtered here
jnb unfcount // was not filtered anyway: do not unfilter jnbs unfcount // was not filtered anyway: do not unfilter
//we will unfilter, and 0!=n_mru, but should we apply mru? //we will unfilter, and 0!=n_mru, but should we apply mru?
section LXCJ6MRU // apply mru to JMP only (0xFF==al) section LXCJ6MRU // apply mru to JMP only (0xFF==al)
jpe lxct3 // jump if even number of 1 bits in al jps lxct3 // jump if even number of 1 bits in al
section LXCJ7MRU // apply mru to CALL only (0xFE==al) section LXCJ7MRU // apply mru to CALL only (0xFE==al)
jpo lxct3 // jump if odd number of 1 bits in al jnps lxct3 // jump if odd number of 1 bits in al
section LXCJ8MRU // do not apply mru to one or both section LXCJ8MRU // do not apply mru to one or both
clc clc
lxct3: lxct3:
+1
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@@ -32,6 +32,7 @@
#include "arch/arm/v5a/macros.S" #include "arch/arm/v5a/macros.S"
/* /*
; ============= ; =============
; ============= ENTRY POINT ; ============= ENTRY POINT
-1
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@@ -31,7 +31,6 @@
#define CJT16 1 #define CJT16 1
#include "arch/i086/macros.S" #include "arch/i086/macros.S"
CPU 8086
/* /*
; ============= ; =============
-2
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@@ -30,10 +30,8 @@
#define EXE 1 #define EXE 1
#include "arch/i086/macros.S" #include "arch/i086/macros.S"
CPU 8086
section DEVICEENTRY section DEVICEENTRY
.long -1 .long -1
.short attribute .short attribute
.short strategy /* .sys header */ .short strategy /* .sys header */
-1
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@@ -32,7 +32,6 @@
#define CJT16 1 #define CJT16 1
#include "arch/i086/macros.S" #include "arch/i086/macros.S"
CPU 8086
/* /*
; ============= ; =============
-1
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@@ -33,7 +33,6 @@
#include "arch/i386/macros.S" #include "arch/i386/macros.S"
// CPU 386
/************************************************************************* /*************************************************************************
// program entry point // program entry point
+1 -2
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@@ -28,9 +28,8 @@
; <jreiser@users.sourceforge.net> ; <jreiser@users.sourceforge.net>
; ;
*/ */
#include "arch/i386/macros.S"
// CPU 386 #include "arch/i386/macros.S"
#define PAGE_SIZE ( 1<<12) #define PAGE_SIZE ( 1<<12)
#define szElf32_Ehdr 0x34 #define szElf32_Ehdr 0x34
-1
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@@ -32,7 +32,6 @@
*/ */
#include "arch/i386/macros.S" #include "arch/i386/macros.S"
// CPU 386
/************************************************************************* /*************************************************************************
+1 -2
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@@ -28,9 +28,8 @@
; <jreiser@users.sourceforge.net> ; <jreiser@users.sourceforge.net>
; ;
*/ */
#include "arch/i386/macros.S"
// CPU 386 #include "arch/i386/macros.S"
// control just falls through, after this part and compiled C code // control just falls through, after this part and compiled C code
// are uncompressed. // are uncompressed.
+2 -2
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@@ -28,8 +28,8 @@
; <jreiser@users.sourceforge.net> ; <jreiser@users.sourceforge.net>
; ;
*/ */
.code32
.intel_syntax noprefix #include "arch/i386/macros.S"
#define SYS_mmap 197 #define SYS_mmap 197
#define SYS_syscall 198 #define SYS_syscall 198
-1
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@@ -29,7 +29,6 @@
#include "arch/i386/macros.S" #include "arch/i386/macros.S"
CPU 386
section DJ2MAIN1 section DJ2MAIN1
push ds push ds
-1
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@@ -29,7 +29,6 @@
#include "arch/i386/macros.S" #include "arch/i386/macros.S"
CPU 386
// ============= // =============
// ============= ENTRY POINT // ============= ENTRY POINT
-1
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@@ -29,7 +29,6 @@
#include "arch/i386/macros.S" #include "arch/i386/macros.S"
CPU 386
section WCLEMAIN section WCLEMAIN
.byte 0xbf // mov edi, 'alib' .byte 0xbf // mov edi, 'alib'
-1
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@@ -32,7 +32,6 @@
*/ */
#include "arch/i386/macros.S" #include "arch/i386/macros.S"
// CPU 386
/************************************************************************* /*************************************************************************
+1 -2
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@@ -28,11 +28,10 @@
; <jreiser@users.sourceforge.net> ; <jreiser@users.sourceforge.net>
; ;
*/ */
#include "arch/i386/macros.S" #include "arch/i386/macros.S"
// CPU 386
#define PAGE_SIZE ( 1<<12) #define PAGE_SIZE ( 1<<12)
#define szElf32_Ehdr 0x34 #define szElf32_Ehdr 0x34
#define szElf32_Phdr 8*4 #define szElf32_Phdr 8*4
@@ -32,7 +32,6 @@
*/ */
#include "arch/i386/macros.S" #include "arch/i386/macros.S"
// CPU 386
/************************************************************************* /*************************************************************************
+1 -1
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@@ -28,9 +28,9 @@
; <jreiser@users.sourceforge.net> ; <jreiser@users.sourceforge.net>
; ;
*/ */
#include "arch/i386/macros.S" #include "arch/i386/macros.S"
// CPU 386
// control just falls through, after this part and compiled C code // control just falls through, after this part and compiled C code
// are uncompressed. // are uncompressed.
+1 -1
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@@ -30,9 +30,9 @@
; <jreiser@users.sourceforge.net> ; <jreiser@users.sourceforge.net>
; ;
*/ */
#include "arch/i386/macros.S" #include "arch/i386/macros.S"
// CPU 386
/************************************************************************* /*************************************************************************
// program entry point // program entry point
+1 -2
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@@ -28,9 +28,8 @@
; <jreiser@users.sourceforge.net> ; <jreiser@users.sourceforge.net>
; ;
*/ */
#include "arch/i386/macros.S"
// CPU 386 #include "arch/i386/macros.S"
#define PAGE_SIZE ( 1<<12) #define PAGE_SIZE ( 1<<12)
+1 -2
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@@ -30,11 +30,10 @@
; <jreiser@users.sourceforge.net> ; <jreiser@users.sourceforge.net>
; ;
*/ */
#include "arch/i386/macros.S" #include "arch/i386/macros.S"
// CPU 386
/************************************************************************* /*************************************************************************
// program entry point // program entry point
// see glibc/sysdeps/i386/elf/start.S // see glibc/sysdeps/i386/elf/start.S
+1 -2
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@@ -30,11 +30,10 @@
; <jreiser@users.sourceforge.net> ; <jreiser@users.sourceforge.net>
; ;
*/ */
#include "arch/i386/macros.S" #include "arch/i386/macros.S"
// CPU 386
#define PAGE_SIZE ( 1<<12) #define PAGE_SIZE ( 1<<12)
#define szElf32_Ehdr 0x34 #define szElf32_Ehdr 0x34
#define szElf32_Phdr 8*4 #define szElf32_Phdr 8*4
@@ -24,6 +24,10 @@
; John Reiser ; John Reiser
; <jreiser@users.sourceforge.net> ; <jreiser@users.sourceforge.net>
*/ */
#include "arch/i386/macros.S"
.att_syntax prefix
// In: %esi=0x90000 setup data "real_mode pointer" // In: %esi=0x90000 setup data "real_mode pointer"
#cli # this must be true already #cli # this must be true already
//// .byte 0xf1 # qemu debug only //// .byte 0xf1 # qemu debug only
+1
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@@ -32,6 +32,7 @@
#include "arch/i386/macros.S" #include "arch/i386/macros.S"
/* /*
; ============= ; =============
; ============= ENTRY POINT ; ============= ENTRY POINT
+1
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@@ -29,6 +29,7 @@
#include "arch/i386/macros.S" #include "arch/i386/macros.S"
// ============= // =============
// ============= ENTRY POINT // ============= ENTRY POINT
// ============= // =============
+1
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@@ -28,6 +28,7 @@
; <jreiser@users.sourceforge.net> ; <jreiser@users.sourceforge.net>
; ;
*/ */
#include "arch/i386/macros.S" #include "arch/i386/macros.S"
#define PAGE_SIZE ( 1<<12) #define PAGE_SIZE ( 1<<12)
-1
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@@ -30,7 +30,6 @@
#define UPX102 1 #define UPX102 1
#include "arch/i386/macros.S" #include "arch/i386/macros.S"
CPU 386
// ============= // =============
// ============= ENTRY POINT // ============= ENTRY POINT
+1 -1
View File
@@ -29,7 +29,7 @@
; Jens Medoch ; Jens Medoch
; <jssg@users.sourceforge.net> ; <jssg@users.sourceforge.net>
; ;
*/ */
.set mips1 .set mips1
.set noreorder .set noreorder
+1 -1
View File
@@ -95,9 +95,9 @@ OFFSET TYPE VALUE
RELOCATION RECORDS FOR [NRVDECO1]: RELOCATION RECORDS FOR [NRVDECO1]:
OFFSET TYPE VALUE OFFSET TYPE VALUE
00000001 R_386_PC8 NRV2B160
00000010 R_386_PC16 NRVDECO2 00000010 R_386_PC16 NRVDECO2
00000018 R_386_PC16 NRVDECO2 00000018 R_386_PC16 NRVDECO2
00000001 R_386_PC8 NRV2B160
RELOCATION RECORDS FOR [NRVDECO2]: RELOCATION RECORDS FOR [NRVDECO2]:
OFFSET TYPE VALUE OFFSET TYPE VALUE
+1 -1
View File
@@ -110,9 +110,9 @@ OFFSET TYPE VALUE
RELOCATION RECORDS FOR [NRVDECO1]: RELOCATION RECORDS FOR [NRVDECO1]:
OFFSET TYPE VALUE OFFSET TYPE VALUE
00000001 R_386_PC8 NRV2B160
00000010 R_386_PC16 NRVDECO2 00000010 R_386_PC16 NRVDECO2
00000018 R_386_PC16 NRVDECO2 00000018 R_386_PC16 NRVDECO2
00000001 R_386_PC8 NRV2B160
RELOCATION RECORDS FOR [NRVDECO2]: RELOCATION RECORDS FOR [NRVDECO2]:
OFFSET TYPE VALUE OFFSET TYPE VALUE
@@ -624,8 +624,8 @@ OFFSET TYPE VALUE
RELOCATION RECORDS FOR [CL1WID10]: RELOCATION RECORDS FOR [CL1WID10]:
OFFSET TYPE VALUE OFFSET TYPE VALUE
00000006 R_386_PC8 CL1TOP07 00000006 R_386_PC8 CL1TOP07
00000010 R_386_PC8 CL1TOP07
0000000a R_386_PC8 CL1WID08 0000000a R_386_PC8 CL1WID08
00000010 R_386_PC8 CL1TOP07
RELOCATION RECORDS FOR [CL1TOP01]: RELOCATION RECORDS FOR [CL1TOP01]:
OFFSET TYPE VALUE OFFSET TYPE VALUE
@@ -65,61 +65,61 @@ Idx Name Size VMA LMA File off Algn Flags
60 CL1FAS1B 00000006 00000000 00000000 0000034d 2**0 CONTENTS, READONLY 60 CL1FAS1B 00000006 00000000 00000000 0000034d 2**0 CONTENTS, READONLY
61 CL1GET1B 00000000 00000000 00000000 00000353 2**0 CONTENTS, READONLY 61 CL1GET1B 00000000 00000000 00000000 00000353 2**0 CONTENTS, READONLY
62 CL1ENTER 00000006 00000000 00000000 00000353 2**0 CONTENTS, RELOC, READONLY 62 CL1ENTER 00000006 00000000 00000000 00000353 2**0 CONTENTS, RELOC, READONLY
63 CL1SMA10 00000009 00000000 00000000 00000359 2**0 CONTENTS, RELOC, READONLY 63 CL1SMA10 00000005 00000000 00000000 00000359 2**0 CONTENTS, RELOC, READONLY
64 CL1RLOAD 00000008 00000000 00000000 00000362 2**0 CONTENTS, READONLY 64 CL1RLOAD 00000008 00000000 00000000 0000035e 2**0 CONTENTS, READONLY
65 CL1WID01 00000002 00000000 00000000 0000036a 2**0 CONTENTS, READONLY 65 CL1WID01 00000002 00000000 00000000 00000366 2**0 CONTENTS, READONLY
66 CL1WID02 00000002 00000000 00000000 0000036c 2**0 CONTENTS, READONLY 66 CL1WID02 00000002 00000000 00000000 00000368 2**0 CONTENTS, READONLY
67 CL1WID03 00000006 00000000 00000000 0000036e 2**0 CONTENTS, RELOC, READONLY 67 CL1WID03 00000002 00000000 00000000 0000036a 2**0 CONTENTS, RELOC, READONLY
68 CL1WID04 00000002 00000000 00000000 00000374 2**0 CONTENTS, READONLY 68 CL1WID04 00000002 00000000 00000000 0000036c 2**0 CONTENTS, READONLY
69 CL1WID05 00000006 00000000 00000000 00000376 2**0 CONTENTS, RELOC, READONLY 69 CL1WID05 00000002 00000000 00000000 0000036e 2**0 CONTENTS, RELOC, READONLY
70 CL1WID06 00000002 00000000 00000000 0000037c 2**0 CONTENTS, READONLY 70 CL1WID06 00000002 00000000 00000000 00000370 2**0 CONTENTS, READONLY
71 CL1WID07 00000003 00000000 00000000 0000037e 2**0 CONTENTS, READONLY 71 CL1WID07 00000003 00000000 00000000 00000372 2**0 CONTENTS, READONLY
72 CL1WID08 00000022 00000000 00000000 00000381 2**0 CONTENTS, RELOC, READONLY 72 CL1WID08 0000001a 00000000 00000000 00000375 2**0 CONTENTS, RELOC, READONLY
73 CL1WID09 00000002 00000000 00000000 000003a3 2**0 CONTENTS, READONLY 73 CL1WID09 00000002 00000000 00000000 0000038f 2**0 CONTENTS, READONLY
74 CL1WID10 00000015 00000000 00000000 000003a5 2**0 CONTENTS, RELOC, READONLY 74 CL1WID10 00000011 00000000 00000000 00000391 2**0 CONTENTS, RELOC, READONLY
75 CL1START 00000005 00000000 00000000 000003ba 2**0 CONTENTS, READONLY 75 CL1START 00000005 00000000 00000000 000003a2 2**0 CONTENTS, READONLY
76 CL1TOP00 00000003 00000000 00000000 000003bf 2**0 CONTENTS, READONLY 76 CL1TOP00 00000003 00000000 00000000 000003a7 2**0 CONTENTS, READONLY
77 CL1TOP01 00000006 00000000 00000000 000003c2 2**0 CONTENTS, RELOC, READONLY 77 CL1TOP01 00000002 00000000 00000000 000003aa 2**0 CONTENTS, RELOC, READONLY
78 CL1TOP02 00000006 00000000 00000000 000003c8 2**0 CONTENTS, RELOC, READONLY 78 CL1TOP02 00000002 00000000 00000000 000003ac 2**0 CONTENTS, RELOC, READONLY
79 CL1TOP03 00000006 00000000 00000000 000003ce 2**0 CONTENTS, RELOC, READONLY 79 CL1TOP03 00000002 00000000 00000000 000003ae 2**0 CONTENTS, RELOC, READONLY
80 CL1TOP04 00000009 00000000 00000000 000003d4 2**0 CONTENTS, RELOC, READONLY 80 CL1TOP04 00000005 00000000 00000000 000003b0 2**0 CONTENTS, RELOC, READONLY
81 CL1TOP05 00000007 00000000 00000000 000003dd 2**0 CONTENTS, RELOC, READONLY 81 CL1TOP05 00000003 00000000 00000000 000003b5 2**0 CONTENTS, RELOC, READONLY
82 CL1TOP06 00000007 00000000 00000000 000003e4 2**0 CONTENTS, RELOC, READONLY 82 CL1TOP06 00000007 00000000 00000000 000003b8 2**0 CONTENTS, RELOC, READONLY
83 CL1TOP07 00000017 00000000 00000000 000003eb 2**0 CONTENTS, READONLY 83 CL1TOP07 00000017 00000000 00000000 000003bf 2**0 CONTENTS, READONLY
84 CL1OFF01 00000002 00000000 00000000 00000402 2**0 CONTENTS, READONLY 84 CL1OFF01 00000002 00000000 00000000 000003d6 2**0 CONTENTS, READONLY
85 CL1OFF02 0000001a 00000000 00000000 00000404 2**0 CONTENTS, RELOC, READONLY 85 CL1OFF02 00000012 00000000 00000000 000003d8 2**0 CONTENTS, RELOC, READONLY
86 CL1OFF03 00000002 00000000 00000000 0000041e 2**0 CONTENTS, READONLY 86 CL1OFF03 00000002 00000000 00000000 000003ea 2**0 CONTENTS, READONLY
87 CL1OFF04 00000008 00000000 00000000 00000420 2**0 CONTENTS, RELOC, READONLY 87 CL1OFF04 00000004 00000000 00000000 000003ec 2**0 CONTENTS, RELOC, READONLY
88 CL1LEN00 00000001 00000000 00000000 00000428 2**0 CONTENTS, READONLY 88 CL1LEN00 00000001 00000000 00000000 000003f0 2**0 CONTENTS, READONLY
89 CL1LEN01 00000002 00000000 00000000 00000429 2**0 CONTENTS, READONLY 89 CL1LEN01 00000002 00000000 00000000 000003f1 2**0 CONTENTS, READONLY
90 CL1LEN02 00000009 00000000 00000000 0000042b 2**0 CONTENTS, RELOC, READONLY 90 CL1LEN02 00000005 00000000 00000000 000003f3 2**0 CONTENTS, RELOC, READONLY
91 CL1COPY0 00000033 00000000 00000000 00000434 2**0 CONTENTS, RELOC, READONLY 91 CL1COPY0 00000033 00000000 00000000 000003f8 2**0 CONTENTS, RELOC, READONLY
92 CL1END 00000000 00000000 00000000 00000467 2**0 CONTENTS, READONLY 92 CL1END 00000000 00000000 00000000 0000042b 2**0 CONTENTS, READONLY
93 LZMA_DEC00 0000002e 00000000 00000000 00000467 2**0 CONTENTS, RELOC, READONLY 93 LZMA_DEC00 0000002e 00000000 00000000 0000042b 2**0 CONTENTS, RELOC, READONLY
94 LZMA_ELF00 00000048 00000000 00000000 00000495 2**0 CONTENTS, READONLY 94 LZMA_ELF00 00000048 00000000 00000000 00000459 2**0 CONTENTS, READONLY
95 LZMA_DEC10 00000a86 00000000 00000000 000004dd 2**0 CONTENTS, READONLY 95 LZMA_DEC10 00000a86 00000000 00000000 000004a1 2**0 CONTENTS, READONLY
96 LZMA_DEC20 00000a86 00000000 00000000 00000f63 2**0 CONTENTS, READONLY 96 LZMA_DEC20 00000a86 00000000 00000000 00000f27 2**0 CONTENTS, READONLY
97 LZMA_DEC30 0000001a 00000000 00000000 000019e9 2**0 CONTENTS, READONLY 97 LZMA_DEC30 0000001a 00000000 00000000 000019ad 2**0 CONTENTS, READONLY
98 CALLTR00 0000000e 00000000 00000000 00001a03 2**0 CONTENTS, RELOC, READONLY 98 CALLTR00 0000000e 00000000 00000000 000019c7 2**0 CONTENTS, RELOC, READONLY
99 CTCLEVE1 00000005 00000000 00000000 00001a11 2**0 CONTENTS, RELOC, READONLY 99 CTCLEVE1 00000005 00000000 00000000 000019d5 2**0 CONTENTS, RELOC, READONLY
100 CALLTR01 00000005 00000000 00000000 00001a16 2**0 CONTENTS, READONLY 100 CALLTR01 00000005 00000000 00000000 000019da 2**0 CONTENTS, READONLY
101 CTBSHR01 00000004 00000000 00000000 00001a1b 2**0 CONTENTS, READONLY 101 CTBSHR01 00000004 00000000 00000000 000019df 2**0 CONTENTS, READONLY
102 CTBROR01 00000002 00000000 00000000 00001a1f 2**0 CONTENTS, READONLY 102 CTBROR01 00000002 00000000 00000000 000019e3 2**0 CONTENTS, READONLY
103 CTBSWA01 00000005 00000000 00000000 00001a21 2**0 CONTENTS, READONLY 103 CTBSWA01 00000005 00000000 00000000 000019e5 2**0 CONTENTS, READONLY
104 CALLTR02 0000000e 00000000 00000000 00001a26 2**0 CONTENTS, RELOC, READONLY 104 CALLTR02 0000000e 00000000 00000000 000019ea 2**0 CONTENTS, RELOC, READONLY
105 CALLTR10 00000005 00000000 00000000 00001a34 2**0 CONTENTS, RELOC, READONLY 105 CALLTR10 00000005 00000000 00000000 000019f8 2**0 CONTENTS, RELOC, READONLY
106 CALLTRE8 00000002 00000000 00000000 00001a39 2**0 CONTENTS, READONLY 106 CALLTRE8 00000002 00000000 00000000 000019fd 2**0 CONTENTS, READONLY
107 CALLTRE9 00000002 00000000 00000000 00001a3b 2**0 CONTENTS, READONLY 107 CALLTRE9 00000002 00000000 00000000 000019ff 2**0 CONTENTS, READONLY
108 CALLTR11 00000004 00000000 00000000 00001a3d 2**0 CONTENTS, RELOC, READONLY 108 CALLTR11 00000004 00000000 00000000 00001a01 2**0 CONTENTS, RELOC, READONLY
109 CTCLEVE2 00000005 00000000 00000000 00001a41 2**0 CONTENTS, RELOC, READONLY 109 CTCLEVE2 00000005 00000000 00000000 00001a05 2**0 CONTENTS, RELOC, READONLY
110 CALLTR12 00000002 00000000 00000000 00001a46 2**0 CONTENTS, READONLY 110 CALLTR12 00000002 00000000 00000000 00001a0a 2**0 CONTENTS, READONLY
111 CTBSHR11 00000004 00000000 00000000 00001a48 2**0 CONTENTS, READONLY 111 CTBSHR11 00000004 00000000 00000000 00001a0c 2**0 CONTENTS, READONLY
112 CTBROR11 00000002 00000000 00000000 00001a4c 2**0 CONTENTS, READONLY 112 CTBROR11 00000002 00000000 00000000 00001a10 2**0 CONTENTS, READONLY
113 CTBSWA11 00000005 00000000 00000000 00001a4e 2**0 CONTENTS, READONLY 113 CTBSWA11 00000005 00000000 00000000 00001a12 2**0 CONTENTS, READONLY
114 CALLTR13 00000005 00000000 00000000 00001a53 2**0 CONTENTS, RELOC, READONLY 114 CALLTR13 00000005 00000000 00000000 00001a17 2**0 CONTENTS, RELOC, READONLY
115 LEXEC015 0000001b 00000000 00000000 00001a58 2**0 CONTENTS, READONLY 115 LEXEC015 0000001b 00000000 00000000 00001a1c 2**0 CONTENTS, READONLY
116 LEXEC017 00000002 00000000 00000000 00001a73 2**0 CONTENTS, READONLY 116 LEXEC017 00000002 00000000 00000000 00001a37 2**0 CONTENTS, READONLY
117 LEXEC020 00000031 00000000 00000000 00001a75 2**0 CONTENTS, READONLY 117 LEXEC020 00000031 00000000 00000000 00001a39 2**0 CONTENTS, READONLY
SYMBOL TABLE: SYMBOL TABLE:
00000000 l d N2BSMA10 00000000 N2BSMA10 00000000 l d N2BSMA10 00000000 N2BSMA10
00000000 l d N2BFAS11 00000000 N2BFAS11 00000000 l d N2BFAS11 00000000 N2BFAS11
@@ -415,47 +415,47 @@ OFFSET TYPE VALUE
RELOCATION RECORDS FOR [CL1SMA10]: RELOCATION RECORDS FOR [CL1SMA10]:
OFFSET TYPE VALUE OFFSET TYPE VALUE
00000004 R_386_PC32 CL1RLOAD 00000003 R_386_PC8 CL1RLOAD
RELOCATION RECORDS FOR [CL1WID03]: RELOCATION RECORDS FOR [CL1WID03]:
OFFSET TYPE VALUE OFFSET TYPE VALUE
00000002 R_386_PC32 CL1WID10 00000001 R_386_PC8 CL1WID10
RELOCATION RECORDS FOR [CL1WID05]: RELOCATION RECORDS FOR [CL1WID05]:
OFFSET TYPE VALUE OFFSET TYPE VALUE
00000002 R_386_PC32 CL1WID10 00000001 R_386_PC8 CL1WID10
RELOCATION RECORDS FOR [CL1WID08]: RELOCATION RECORDS FOR [CL1WID08]:
OFFSET TYPE VALUE OFFSET TYPE VALUE
00000007 R_386_PC32 CL1WID06 00000006 R_386_PC8 CL1WID06
00000015 R_386_PC32 CL1WID10 00000010 R_386_PC8 CL1WID10
0000001e R_386_PC32 CL1COPY0 00000016 R_386_PC32 CL1COPY0
RELOCATION RECORDS FOR [CL1WID10]: RELOCATION RECORDS FOR [CL1WID10]:
OFFSET TYPE VALUE OFFSET TYPE VALUE
00000006 R_386_PC8 CL1TOP07 00000006 R_386_PC8 CL1TOP07
00000014 R_386_PC8 CL1TOP07 0000000a R_386_PC8 CL1WID08
0000000b R_386_PC32 CL1WID08 00000010 R_386_PC8 CL1TOP07
RELOCATION RECORDS FOR [CL1TOP01]: RELOCATION RECORDS FOR [CL1TOP01]:
OFFSET TYPE VALUE OFFSET TYPE VALUE
00000002 R_386_PC32 CL1TOP07 00000001 R_386_PC8 CL1TOP07
RELOCATION RECORDS FOR [CL1TOP02]: RELOCATION RECORDS FOR [CL1TOP02]:
OFFSET TYPE VALUE OFFSET TYPE VALUE
00000002 R_386_PC32 CL1TOP07 00000001 R_386_PC8 CL1TOP07
RELOCATION RECORDS FOR [CL1TOP03]: RELOCATION RECORDS FOR [CL1TOP03]:
OFFSET TYPE VALUE OFFSET TYPE VALUE
00000002 R_386_PC32 CL1TOP07 00000001 R_386_PC8 CL1TOP07
RELOCATION RECORDS FOR [CL1TOP04]: RELOCATION RECORDS FOR [CL1TOP04]:
OFFSET TYPE VALUE OFFSET TYPE VALUE
00000002 R_386_PC32 CL1TOP07 00000001 R_386_PC8 CL1TOP07
RELOCATION RECORDS FOR [CL1TOP05]: RELOCATION RECORDS FOR [CL1TOP05]:
OFFSET TYPE VALUE OFFSET TYPE VALUE
00000002 R_386_PC32 CL1TOP06 00000001 R_386_PC8 CL1TOP06
RELOCATION RECORDS FOR [CL1TOP06]: RELOCATION RECORDS FOR [CL1TOP06]:
OFFSET TYPE VALUE OFFSET TYPE VALUE
@@ -463,16 +463,16 @@ OFFSET TYPE VALUE
RELOCATION RECORDS FOR [CL1OFF02]: RELOCATION RECORDS FOR [CL1OFF02]:
OFFSET TYPE VALUE OFFSET TYPE VALUE
00000002 R_386_PC32 CL1TOP07 00000001 R_386_PC8 CL1TOP07
00000014 R_386_PC32 CL1COPY0 0000000f R_386_PC8 CL1COPY0
RELOCATION RECORDS FOR [CL1OFF04]: RELOCATION RECORDS FOR [CL1OFF04]:
OFFSET TYPE VALUE OFFSET TYPE VALUE
00000004 R_386_PC32 CL1COPY0 00000003 R_386_PC8 CL1COPY0
RELOCATION RECORDS FOR [CL1LEN02]: RELOCATION RECORDS FOR [CL1LEN02]:
OFFSET TYPE VALUE OFFSET TYPE VALUE
00000002 R_386_PC32 CL1LEN00 00000001 R_386_PC8 CL1LEN00
RELOCATION RECORDS FOR [CL1COPY0]: RELOCATION RECORDS FOR [CL1COPY0]:
OFFSET TYPE VALUE OFFSET TYPE VALUE