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Import 0-upx-hg_mips-r3k_ucl.patch.

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This commit is contained in:
Jens Medoch
2010-03-06 16:25:29 +01:00
parent 3bc3b3d10e
commit af0c9ef092
4 changed files with 170 additions and 218 deletions
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src/stub/src/arch/mips/mipsel.r3000/bits.ash
+155 -208
View File
@@ -81,6 +81,7 @@
#define m_pos t7 #define m_pos t7
#else /*}{*/ #else /*}{*/
.print "\nwarning redefined src / dst\n" .print "\nwarning redefined src / dst\n"
#define tmp v1 #define tmp v1
@@ -118,14 +119,13 @@
.if ((\bsz != 32) && (\bsz != 8)) .if ((\bsz != 32) && (\bsz != 8))
.error "UCL_NRV_BB must be 8 or 32 and not \bsz") .error "UCL_NRV_BB must be 8 or 32 and not \bsz")
.else .else
.if (PS1 == 1)
PRINT ("R3000 code")
.else
PRINT ("R5900 code")
.endif
PRINT ("\bsz bit, small = \opt, fast memcpy = \fmcpy") PRINT ("\bsz bit, small = \opt, fast memcpy = \fmcpy")
.endif .endif
.if (PS1)
PRINT ("R3000 code")
.else
PRINT ("R5900 code")
.endif
.endm .endm
@@ -133,7 +133,7 @@
;// init decompressor ;// init decompressor
;////////////////////////////////////// ;//////////////////////////////////////
.macro init gb_subr .macro init
init_sz = . init_sz = .
@@ -153,49 +153,12 @@ init_sz = .
lui bc,1 << (31 - 16) lui bc,1 << (31 - 16)
move bb,bc move bb,bc
.endif .endif
.endif .endif
li last_m_off,1
.if (src != src_ilen) .if (src != src_ilen)
move src_ilen,src move src_ilen,src
.endif .endif
.ifnb gb_subr
.if (BIG_ENDIAN == 1)
.if (JOHN != 1) || (UCL_SMALL != 1) || (ALT_SMALL != 1)
.error "assume 1==JOHN==UCL_SMALL==ALT_SMALL"
.endif
local around, refill
gb_e = gb_subr
b around
li last_m_off,1
refill:
// "lw bb,0(src_ilen)" of little-endian, unaligned data
lbu bb,3(src_ilen)
lbu var,2(src_ilen)
sll bb,bb,8
or bb,bb,var
lbu var,1(src_ilen)
sll bb,bb,8
or bb,bb,var
lbu var,0(src_ilen)
sll bb,bb,8
or bb,bb,var
addiu src_ilen,4
srl var,bb,31 # var= most significant bit of bb
sll bb,1
jr ra
addiu bb,1 # the flag bit
gb_subr:
beq bc,bb,refill # detect empty
srl var,bb,31 # var= most significant bit of bb
jr ra
sll bb,1
around:
.else
li last_m_off,1
.endif
.else
li last_m_off,1
.endif
init_sz = . - init_sz init_sz = . - init_sz
@@ -227,9 +190,9 @@ init_sz = . - init_sz
bltz bc,2b bltz bc,2b
.endif .endif
.else .else
srl var,bb,31 # var= most significant bit of bb srl var,bb,31 # var= most significant bit of bb
bne bc,bb,2f # detect flag bit [empty] bne bc,bb,2f # detect flag bit [empty]
sll bb,1 sll bb,1
.endif .endif
.endif .endif
@@ -248,9 +211,9 @@ init_sz = . - init_sz
.if (UCL_SMALL == 1) .if (UCL_SMALL == 1)
.if (ALT_SMALL == 1) .if (ALT_SMALL == 1)
srl var,bb,31 # var= most significant bit of bb srl var,bb,31 # var= most significant bit of bb
jr ra jr ra
sll bb,1 sll bb,1
.else .else
srlv var,bb,bc srlv var,bb,bc
jr ra jr ra
@@ -260,11 +223,11 @@ init_sz = . - init_sz
.if (UCL_NRV_BB == 8) .if (UCL_NRV_BB == 8)
sll bb,1 sll bb,1
addiu bb,1 # the flag bit addiu bb,1 # the flag bit
srl var,bb,8 # var= most significant bit of bb srl var,bb,8 # var= most significant bit of bb
sll bb,24 # left-justify in register sll bb,24 # left-justify in register
.else .else
srl var,bb,31 # var= most significant bit of bb srl var,bb,31 # var= most significant bit of bb
sll bb,1 sll bb,1
addiu bb,1 addiu bb,1
.endif .endif
.endif .endif
@@ -277,84 +240,83 @@ init_sz = . - init_sz
.if (JOHN == 0) .if (JOHN == 0)
li bc,7 li bc,7
lbu bb,0(src_ilen)
addiu src_ilen,1
.else // John's method .else // John's method
.if (ALT_SMALL == 0) .if ((ALT_SMALL == 0) && (UCL_SMALL == 1))
.if (UCL_SMALL == 1)
li bc,8 li bc,8
.endif
.endif .endif
.endif
lbu bb,0(src_ilen) lbu bb,0(src_ilen)
addiu src_ilen,1 addiu src_ilen,1
.if (JOHN != 0)
.if ((ALT_SMALL == 1) && (UCL_SMALL == 1)) .if ((ALT_SMALL == 1) && (UCL_SMALL == 1))
sll bb,1 sll bb,1
addiu bb,1 # the flag bit addiu bb,1 # the flag bit
sll bb,24-1 # left-justify in register sll bb,24-1 # left-justify in register
.endif .endif
.endif .endif
.endm .endm
#if defined(__MIPSEB__)
#ifndef BIG_ENDIAN # define LOAD_F lwl
#define BIG_ENDIAN 0 # define LOAD_R lwr
# define STORE_F swl
# define STORE_R swr
#elif defined(__MIPSEL__)
# define LOAD_F lwr
# define LOAD_R lwl
# define STORE_F swr
# define STORE_R swl
#else
# error "MIPS, but neither __MIPSEB__, nor __MIPSEL__???"
#endif #endif
.macro TO_LE32 reg
#if defined(__MIPSEB__)
.if ((\reg == var) || (\reg == tmp))
.error "need \reg for endian swap!"
.endif
li tmp,0x00ff00ff
srl var,\reg,8
and var,tmp
and \reg,tmp
sll \reg,8
or \reg,var
srl var,\reg,16
sll \reg,16
or \reg,var
#endif
.endm
.macro FILLBYTES_32 .macro FILLBYTES_32
.if (JOHN == 0) .if (JOHN == 0)
.if (BIG_ENDIAN == 1) .if (UCL_SMALL == 1)
// "lw bb,0(src_ilen)" of little-endian, unaligned data
lbu bb,3(src_ilen)
lbu tmp,2(src_ilen)
sll bb,bb,8
or bb,bb,tmp
lbu tmp,1(src_ilen)
sll bb,bb,8
or bb,bb,tmp
lbu tmp,0(src_ilen)
sll bb,bb,8
or bb,bb,tmp
.else // LITTLE_ENDIAN
lwr bb,0(src_ilen)
lwl bb,3(src_ilen)
.endif
addiu src_ilen,4
.if (UCL_SMALL == 1)
li bc,32 li bc,32
.else .else
li bc,31 li bc,31
.endif .endif
.else // John's method
.if (ALT_SMALL == 0) .else // John's method
.if (UCL_SMALL == 1)
.if ((ALT_SMALL == 0) && (UCL_SMALL == 1))
li bc,32 li bc,32
.endif
.endif
.if (BIG_ENDIAN == 1)
// "lw bb,0(src_ilen)" of little-endian, unaligned data
lbu bb,3(src_ilen)
lbu tmp,2(src_ilen)
sll bb,bb,8
or bb,bb,tmp
lbu tmp,1(src_ilen)
sll bb,bb,8
or bb,bb,tmp
lbu tmp,0(src_ilen)
sll bb,bb,8
or bb,bb,tmp
.else // LITTLE_ENDIAN
lwr bb,0(src_ilen)
lwl bb,3(src_ilen)
.endif .endif
.endif
LOAD_F bb,0(src_ilen)
LOAD_R bb,3(src_ilen)
TO_LE32 bb
addiu src_ilen,4 addiu src_ilen,4
.if (JOHN != 0)
.if ((ALT_SMALL == 1) && (UCL_SMALL == 1)) .if ((ALT_SMALL == 1) && (UCL_SMALL == 1))
srl var,bb,31 # var= most significant bit of bb srl var,bb,31 # var= most significant bit of bb
sll bb,1 sll bb,1
jr ra jr ra
addiu bb,1 addiu bb,1
.endif .endif
@@ -372,24 +334,28 @@ init_sz = . - init_sz
.endm .endm
.macro GBIT .macro GBIT label
.if (UCL_SMALL == 1) .if (UCL_SMALL == 1)
2: 2:
FILLBITS FILLBITS
1: .ifnb label
\label:
.else
1:
.endif
ADDBITS ADDBITS
ADDBITS_DONE ADDBITS_DONE
.else .else
ADDBITS ADDBITS
FILLBITS FILLBITS
.if (JOHN == 1) .if (JOHN == 1)
ADDBITS_DONE ADDBITS_DONE
2: 2:
.else .else
2: 2:
ADDBITS_DONE ADDBITS_DONE
.endif .endif
.endif .endif
.endm .endm
@@ -399,7 +365,7 @@ init_sz = . - init_sz
;// getbit call macro for SMALL version ;// getbit call macro for SMALL version
;////////////////////////////////////// ;//////////////////////////////////////
.macro GETBIT p1 .macro GETBIT flag
.if (UCL_SMALL == 1) .if (UCL_SMALL == 1)
.if (WITHOUT_SUB == 1) .if (WITHOUT_SUB == 1)
@@ -407,29 +373,30 @@ init_sz = . - init_sz
.else .else
t = 1f t = 1f
.endif .endif
.ifb p1 .ifb flag
bal t // gb_sub bal t // gb_sub
.else
.if (JOHN == 0) .else // we have a delay slot to fill
bal t+4 // gb_sub+4
addiu bc,-1
.else // John's method .if (JOHN == 0)
bal t + 4 // gb_sub + 4
addiu bc,-1
.if (UCL_SMALL == 1) .else // John's method
.if (ALT_SMALL == 0)
bal t+4 // gb_sub+4 .if (ALT_SMALL == 0)
addiu bc,-1 bal t + 4 // gb_sub + 4
.else addiu bc,-1 // fill delay slot
bal t // gb_sub+4 .else
nop bal t // gb_sub
nop
.endif
.endif
.endif .endif
.endif
.endif .else // UCL_SMALL == 0
.endif
.else GBIT
GBIT
.endif .endif
.endm .endm
@@ -439,9 +406,7 @@ init_sz = . - init_sz
;// getbit call macro for SMALL version ;// getbit call macro for SMALL version
;////////////////////////////////////// ;//////////////////////////////////////
.macro build option, type, label .macro build type, option, label
local done
.ifc "\option", "full" .ifc "\option", "full"
.ifnb label .ifnb label
@@ -453,31 +418,28 @@ init_sz = . - init_sz
.endif .endif
.else .else
.ifc "\option", "sub_only" .ifc "\option", "sub_only"
.ifnb label
2:
FILLBITS
.ifnb label
.global \label .global \label
\label: GBIT \label
.endif .else
ADDBITS GBIT
ADDBITS_DONE .endif
.else .else
.ifc "\option", "without_sub" .ifc "\option", "without_sub"
.if (UCL_SMALL == 1) .if (UCL_SMALL == 1)
PRINT ("[WARNING] building \type with UCL_SMALL = 1 without subroutine") PRINT ("[WARNING] building \type with UCL_SMALL = 1 without subroutine")
WITHOUT_SUB = 1 WITHOUT_SUB = 1
\type decomp_done \type decomp_done
WITHOUT_SUB = 0 WITHOUT_SUB = 0
.else
.error "cannot build \"without_sub\" if UCL_SMALL = 0"
.endif
.else .else
.error "cannot build \"without_sub\" if UCL_SMALL = 0" .error "use \"full\", \"sub_only\" or \"without_sub\" for build"
.endif .endif
.else
.error "use \"full\", \"sub\" or \"without_sub\" for build"
.endif
.endif .endif
.endif .endif
.endm .endm
@@ -485,7 +447,36 @@ init_sz = . - init_sz
;// ucl memcpy ;// ucl memcpy
;////////////////////////////////////// ;//////////////////////////////////////
.macro uclmcpy ret .macro gen_ret ret
.if (UCL_SMALL == 1)
.if (WITHOUT_SUB == 1)
t = gb_e
.else
t = 1f
.endif
.if (1 == 1)
b \ret
nop
.else // works on real hdw, allmost fail on sim
bal t
addiu ra, (\ret + 4) - (. + 4)
.endif
.else // UCL_SMALL == 0
.if (JOHN == 0)
b \ret
nop
.else
b \ret + 4
srl var,bb,31 # var = most significant bit of bb
.endif
.endif
.endm
.macro uclmcpy ret
local wordchk, prepbcpy local wordchk, prepbcpy
local bcopy, skip local bcopy, skip
@@ -494,75 +485,31 @@ init_sz = . - init_sz
slti var,m_off,4 slti var,m_off,4
bnez var,prepbcpy bnez var,prepbcpy
subu m_pos,dst,m_off subu m_pos,dst,m_off
wordchk: wordchk:
slti var,m_len,4 slti var,m_len,4
bnez var,skip bnez var,skip
lwr var,0(m_pos) LOAD_F var,0(m_pos)
lwl var,3(m_pos) LOAD_R var,3(m_pos)
addiu m_len,-4 addiu m_len,-4
swr var,0(dst) STORE_F var,0(dst)
swl var,3(dst) STORE_R var,3(dst)
addiu m_pos,4 addiu m_pos,4
bnez m_len,wordchk bnez m_len,wordchk
addiu dst,4 addiu dst,4
gen_ret \ret
.if (UCL_SMALL == 1) prepbcpy:
.if (WITHOUT_SUB == 1)
t = gb_e
.else
t = 1f
.endif
.if (1 == 1)
b \ret
nop
.else
bal t
addiu ra, (\ret + 4) - (. + 4)
.endif
.else
.if (JOHN == 0)
b \ret
nop
.else
b \ret + 4
srl var,bb,31 # var= most significant bit of bb
.endif
.endif
prepbcpy:
.else .else
subu m_pos,dst,m_off subu m_pos,dst,m_off
.endif .endif
bcopy: bcopy:
lbu var,0(m_pos) lbu var,0(m_pos)
skip: skip:
addiu m_len,-1 addiu m_len,-1
addiu m_pos,1 addiu m_pos,1
addiu dst,1 addiu dst,1
bnez m_len,bcopy bnez m_len,bcopy
sb var,-1(dst) sb var,-1(dst)
gen_ret \ret
.if (UCL_SMALL == 1)
.if (WITHOUT_SUB == 1)
t = gb_e
.else
t = 1f
.endif
.if (1 == 1)
b \ret
nop
.else
bal t
addiu ra, (\ret + 4) - (. + 4)
.endif
.else
.if (JOHN == 0)
b \ret
nop
.else
b \ret + 4
srl var,bb,31 # var= most significant bit of bb
.endif
.endif
.endm .endm
src/stub/src/arch/mips/mipsel.r3000/nrv2b_d.ash
+9 -4
View File
@@ -43,16 +43,16 @@
local n2b_1, n2b_2, n2b_3 local n2b_1, n2b_2, n2b_3
local n2b_4, n2b_5, n2b_6 local n2b_4, n2b_5, n2b_6
init gb_nrv2b init
n2b_1: n2b_1:
GETBIT GETBIT
li m_off,1 li m_off,1
beqz var,n2b_2 beqz var,n2b_2
lbu var,0(src_ilen) lbu var,0(src_ilen)
addiu src_ilen,1 addiu src_ilen,1
sb var,0(dst)
b n2b_1
addiu dst,1 addiu dst,1
b n2b_1
sb var,-1(dst)
n2b_2: n2b_2:
GETBIT GETBIT
sll m_off,1 sll m_off,1
@@ -76,9 +76,14 @@ n2b_3:
addiu m_off,1 addiu m_off,1
beqz m_off,\done beqz m_off,\done
addiu src_ilen,1 addiu src_ilen,1
.if (UCL_SMALL == 0)
move last_m_off,m_off move last_m_off,m_off
.endif
n2b_4: n2b_4:
GETBIT 1 GETBIT
.if (UCL_SMALL == 1)
move last_m_off,m_off
.endif
move m_len,var move m_len,var
GETBIT GETBIT
sll m_len,1 sll m_len,1
src/stub/src/arch/mips/mipsel.r3000/nrv2d_d.ash
+3 -3
View File
@@ -43,16 +43,16 @@
local n2d_1, n2d_2, n2d_3, n2d_4 local n2d_1, n2d_2, n2d_3, n2d_4
local n2d_5, n2d_6, n2d_7 local n2d_5, n2d_6, n2d_7
init gb_nrv2d init
n2d_1: n2d_1:
GETBIT GETBIT
li m_off,1 li m_off,1
beqz var,n2d_2 beqz var,n2d_2
lbu var,0(src_ilen) lbu var,0(src_ilen)
addiu src_ilen,1 addiu src_ilen,1
sb var,0(dst)
b n2d_1
addiu dst,1 addiu dst,1
b n2d_1
sb var,-1(dst)
n2d_2: n2d_2:
GETBIT GETBIT
sll m_off,1 sll m_off,1
src/stub/src/arch/mips/mipsel.r3000/nrv2e_d.ash
+3 -3
View File
@@ -43,16 +43,16 @@
local n2e_1, n2e_2, n2e_3, n2e_4 local n2e_1, n2e_2, n2e_3, n2e_4
local n2e_5, n2e_6, n2e_7 local n2e_5, n2e_6, n2e_7
init gb_nrv2e init
n2e_1: n2e_1:
GETBIT GETBIT
li m_off,1 li m_off,1
beqz var,n2e_2 beqz var,n2e_2
lbu var,0(src_ilen) lbu var,0(src_ilen)
addiu src_ilen,1 addiu src_ilen,1
sb var,0(dst)
b n2e_1
addiu dst,1 addiu dst,1
b n2e_1
sb var,-1(dst)
n2e_2: n2e_2:
GETBIT GETBIT
sll m_off,1 sll m_off,1