347 lines
8.6 KiB
ArmAsm
347 lines
8.6 KiB
ArmAsm
/* l_armpet.S -- ARM/PE decompressor assembly startup (thumb mode)
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This file is part of the UPX executable compressor.
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Copyright (C) 1996-2006 Markus Franz Xaver Johannes Oberhumer
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Copyright (C) 1996-2006 Laszlo Molnar
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Copyright (C) 2000-2006 John F. Reiser
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All Rights Reserved.
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UPX and the UCL library are free software; you can redistribute them
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and/or modify them under the terms of the GNU General Public License as
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published by the Free Software Foundation; either version 2 of
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the License, or (at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; see the file COPYING.
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If not, write to the Free Software Foundation, Inc.,
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59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
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Markus F.X.J. Oberhumer Laszlo Molnar
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<mfx@users.sourceforge.net> <ml1050@users.sourceforge.net>
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John F. Reiser
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<jreiser@users.sourceforge.net>
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*/
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#define DEBUG 0
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// magic for the UPX linker
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#define SECT(n) .text 1; .asciz #n; .long n - _start; .text 0; n
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#define BL(t) \
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.text 1; .long 0, bl##t - _start; .asciz #t; .long 0; \
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.text 0; .byte 0, 0, 0; bl##t: .byte 0xf8
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@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
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.text
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.balign 0
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.globl _start
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.arm
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_start:
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dst0 .req r9 @ global register
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SECT(DllStart):
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cmp r1, #1
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bne .Lstart_orig
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SECT(ExeStart):
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stmfd sp!, {r0 - r11, lr}
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@ access all pages in ARM mode - this seems to be required
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@ otherwise the THUMB mode stuff fails
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adr r3, SRC0
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ldmia r3, {r5, r6, r7, r9, r10, r11, ip} @ r5=src0, r7=dst0
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add r5, pc, #4096 @ r3=addr src0, r10=LoadLibraryW
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.L01: @ r11=GetProcAddressA, ip=CacheSync
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ldr r6, [r7]
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add r7, r7, #4096
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cmp r7, r5
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bls .L01
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adr r4, ProcessAll + 1
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mov lr, pc
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bx r4
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ldmfd sp!, {r0 - r11, lr}
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.Lstart_orig:
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ldr ip, ENTR
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bx ip
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SRC0: .ascii "SRC0" @ start of compressed data
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SRCL: .ascii "SRCL" @ compressed length
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DST0: .ascii "DST0" @ start of uncompressed data
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DSTL: .ascii "DSTL" @ uncompressed length
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IATT: .ascii "IATT"; .long 0, 0, 0 @ import address table
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ENTR: .ascii "ENTR" @ original entry point
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.thumb
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ProcessAll:
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ldmia r3!, {r0, r1, r2} @ r0=src0, r1=slen, r2=dst0, r3=addr dstl
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mov dst0, r2
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mov r4, ip @ CacheSync
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push {r4, lr}
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.align 2
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@@ uncompress/unfilter/imports/relocs are copied here by the upx linker
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@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
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SECT(Unfilter_0x50):
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.align 2
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buffer .req r0
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addval .req r2
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bufend .req r4
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ldr buffer, FIBS
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mov addval, #0
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ldr bufend, FIBE
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mov r5, #0x0f
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mov r6, #0xff
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lsl r6, #24
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mvn r7, r6
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.Luf50_0:
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cmp buffer, bufend
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beq .Luf50_ret
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ldrb r3, [buffer, #3]
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and r3, r5
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cmp r3, #0x0b
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bne .Luf50_1
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ldr r3, [buffer]
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mov r1, r3
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and r1, r6
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sub r3, addval
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and r3, r7
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orr r3, r1
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str r3, [buffer]
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.Luf50_1:
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add buffer, #4
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add addval, #1
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b .Luf50_0
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.unreq buffer
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.unreq addval
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.unreq bufend
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.align 2
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FIBS: .ascii "FIBS" @ buffer start for filter
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FIBE: .ascii "FIBE" @ buffer end for filter
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.Luf50_ret:
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@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
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SECT(Relocs):
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.align 2
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buffer .req r0
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dest .req r1
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addval .req r2
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ldr buffer, BREL
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mov addval, dst0
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sub dest, addval, #4
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.Lreloc_loop:
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ldrb r3, [buffer]
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add buffer, #1
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cmp r3, #0
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beq .Lreloc_end
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cmp r3, #0xf0
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blo .Lreloc_add
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mov r4, #0x0f
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and r4, r3
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ldrb r3, [buffer, #1] @ get_le16
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lsl r4, #8
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add r4, r3
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ldrb r3, [buffer]
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add buffer, #2
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lsl r4, #8
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add r3, r4
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.Lreloc_add:
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add dest, r3
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mov r5, #0
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.Lread_be32:
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ldrb r3, [dest, r5]
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lsl r4, #8
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add r4, r3
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add r5, #1
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cmp r5, #4
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bne .Lread_be32
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add r4, addval
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str r4, [dest]
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b .Lreloc_loop
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.align 2
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BREL: .ascii "BREL" @ start of reloc info
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.Lreloc_end:
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@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
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SECT(Imports):
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.align 2
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imp .req r4
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iat .req r5
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dll .req r6
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mov r7, sp
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sub sp, #508
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sub sp, #508
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sub sp, #508
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sub sp, #508
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ldr imp, BIMP
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.Lhi_loop1:
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mov r0, imp
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bl get_le32
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beq .Lhi_end
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ldr r1, ONAM
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add r0, r1
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mov r1, sp
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.Lhi_copyname:
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ldrb r2, [r0]
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add r0, #1
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strh r2, [r1]
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add r1, #2
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cmp r2, #0
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bne .Lhi_copyname
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mov r0, sp
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bl LoadLibraryW
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mov dll, r0
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add r0, imp, #4
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bl get_le32
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mov iat, dst0
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add iat, r0
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add imp, #8
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.Lhi_gpa_loop:
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ldrb r0, [imp]
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add imp, #1
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cmp r0, #1
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bmi .Lhi_loop1
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bne .Lhi_by_ord
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mov r1, imp
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.Lhi_by_name:
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ldrb r0, [imp]
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add imp, #1
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cmp r0, #0
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bne .Lhi_by_name
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b .Lhi_call_gpa
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.Lhi_by_ord:
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ldrb r0, [imp]
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ldrb r1, [imp, #1]
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add imp, #2
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lsl r1, #8
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add r1, r0
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.Lhi_call_gpa:
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mov r0, dll
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bl GetProcAddressA
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str r0, [iat]
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add iat, #4
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b .Lhi_gpa_loop
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.unreq iat
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.unreq imp
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.unreq dll
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get_le32: @ optimized for size
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mov r1, #3
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.Lg0:
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ldrb r3, [r0, r1]
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lsl r2, r2, #8
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add r2, r2, r3
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sub r1, #1
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bpl .Lg0
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mov r0, r2 @ sets the Z flag if zero
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bx lr
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LoadLibraryW:
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bx r10
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GetProcAddressA:
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bx r11
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.align 2
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BIMP: .ascii "BIMP" @ start of import data
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ONAM: .ascii "ONAM" @ start of dll names
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.Lhi_end:
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mov sp, r7
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@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
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SECT(ProcessEnd):
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pop {r1, r2} @ r1=CacheSync, r2=lr
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mov r0, #4 @ parameter of CacheSync
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mov lr, r2
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bx r1
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@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
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#define XSECT(n) .text 1; .asciz #n; .long n - _start; .text 0
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SECT(dummy0):
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.align 2
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.arm
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#include "arm_nrv2b_d8.S"
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XSECT (go_thumb_n2b)
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SECT(Call2B):
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BL (go_thumb_n2b)
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#undef wrnk
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#undef GETBIT
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SECT(dummy1):
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.align 2
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.arm
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#include "arm_nrv2e_d8.S"
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XSECT (thumb_nrv2e_d8)
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SECT(Call2E):
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BL (thumb_nrv2e_d8)
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@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
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SECT(UPX1HEAD):
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.byte 85,80,88,33 @ 0 UPX_MAGIC_LE32
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.byte 161,216,208,213 @ 4 UPX_MAGIC2_LE32
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.long 0 @ 8 uncompressed adler32
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.long 0 @ 12 compressed adler32
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.long 0 @ 16 uncompressed len
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.long 0 @ 20 compressed len
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.long 0 @ 24 original file size
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.byte 0 @ 28 filter id
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.byte 0 @ 29 filter cto
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.byte 0 @ unused
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.byte 45 @ 31 header checksum
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@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
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.arm
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SECT(eof):
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.text 1
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.long -1; .short eof - _start
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