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Optimized autoconfig for AMD CPUs with < 2 MB L3 cache per thread

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This commit is contained in:
SChernykh 2025-03-22 11:34:23 +01:00
parent 16ecb8f085
commit 6cfc02d24f
1 changed files with 7 additions and 2 deletions
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9
src/backend/cpu/platform/HwlocCpuInfo.cpp
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@ -320,8 +320,13 @@ void xmrig::HwlocCpuInfo::processTopLevelCache(hwloc_obj_t cache, const Algorith
L2 += l2->attr->cache.size; L2 += l2->attr->cache.size;
L2_associativity = l2->attr->cache.associativity; L2_associativity = l2->attr->cache.associativity;
if (L3_exclusive && l2->attr->cache.size >= scratchpad) { if (L3_exclusive) {
extra += scratchpad; if (vendor() == VENDOR_AMD) {
extra += std::min<size_t>(l2->attr->cache.size, scratchpad);
}
else if (l2->attr->cache.size >= scratchpad) {
extra += scratchpad;
}
} }
} }
} }