7 Commits

Author	SHA1	Message	Date
XMRig	9e3f2ae9f9	Added x3 x4 x5 hashing modes.	2018-04-16 15:40:37 +07:00
XMRig	e78e810cfe	Fix code style, replace tabs to space.	2018-02-08 17:02:32 +07:00
Foudge	9a28ad590c	up to 20% perf increase with Cryptonight with non-AES CPU ... This time, the performance increase is got with MSVC and GCC. On non-AES CPU, there were an useless load/store SSE2 register. The last MSVC "hack" is replaced by a portable code and he's more complete (a load is saved). On my C2Q6600, with 3 thread, I have +16% with MSVC2015 and +20% with GCC 7.3, compared to official 2.4.4 version.	2018-01-28 12:58:19 +01:00
Foudge	9bceb65ad8	+15% boost with non-AES CPU ... Performance boost validated on Core 2 Quad processor under Windows 10. But it's Windows/MS Visual C++ specific.	2018-01-20 10:43:56 +01:00
XMRig	aa4f8b6fa7	#216 Added ARMv7 support.	2017-11-26 22:23:23 +03:00
XMRig	6cc152e26f	Added ARMv8 (aarch64) support.	2017-11-06 03:11:35 +03:00
XMRig	d403dcf95c	Optimized software aes.	2017-11-03 05:35:29 +03:00