8 Commits

Author	SHA1	Message	Date
XMRig	e78e810cfe	Fix code style, replace tabs to space.	2018-02-08 17:02:32 +07:00
Foudge	037abd7037	Correct L2 cache size calculation for Intel Core 2 family ... This is a workaround for total L2 cache size calculation of Intel Core Solo, Core Duo, Core 2 Duo, Core 2 Quad and their Xeon homologue. These processors have L2 cache shared by 2 cores. There is maybe more CPU with L2 shared cache, but I am sure that these models are concerned and they are not so numerous. A better way would be to modify libcpuid to implement L2 cache counting.	2018-02-03 16:31:13 +01:00
XMRig	1391a2d858	#184 Workaround for CPUs with disabled Hyper-Threading.	2017-11-02 19:40:33 +03:00
XMRig	a07b0e5953	Fix Visual Studio warnings.	2017-08-14 09:30:41 +03:00
XMRig	a680220d28	Fixed autoconf mode for AMD FX CPUs.	2017-08-02 18:59:24 +03:00
XMRig	8c2951db2d	Add signal handlers.	2017-06-13 13:20:15 +03:00
XMRig	b11f95d248	Restore libcpuid support.	2017-06-08 01:51:24 +03:00
XMRig	0556fd664c	Add Cpu class.	2017-06-08 00:10:26 +03:00