jory/xmrig-minimized-dll
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231 Commits

Author SHA1 Message Date
XMRig
6379d1f90e
Add static_assert 2020-11-15 04:13:40 +07:00
SChernykh
9a1e867da2 Fixed MSR mod names in JSON API 2020-11-14 19:55:43 +01:00
SChernykh
44054ac7eb Added CPUID info to JSON report 2020-11-10 12:15:52 +01:00
SChernykh
c8c0abdb00 Separate MSR mod for Zen/Zen2 and Zen3 
Another +0.5% speedup for Zen2
 2020-11-08 19:40:44 +01:00
XMRig
51690ebad6
#1918 Fixed check for 1GB huge pages on ARM Linux. 2020-11-02 21:26:35 +07:00
XMRig
3910cf9e69
Added vendor to ARM CPUs name and added "arch" field. 2020-11-01 12:06:35 +07:00
XMRig
4914fefb1f
Added "msr" field for CPU backend. 2020-10-25 16:36:37 +07:00
XMRig
79c96418c7
Implemented BenchClient. 2020-10-24 19:43:23 +07:00
XMRig
36c1cb23e0
Implemented static benchmark verification (--bench --seed --hash) 2020-10-24 13:53:49 +07:00
XMRig
328f985e07
Added Benchmark class. 2020-10-17 04:03:42 +07:00
XMRig
7fc7b976bf
Removed m_bench field from Job class. 2020-10-16 20:29:11 +07:00
XMRig
36b1523194
Code cleanup. 2020-10-16 19:35:36 +07:00
XMRig
a152d6be42
Added CMake option WITH_BENCHMARK. 2020-10-16 02:18:07 +07:00
SChernykh
2ecece7b3d Added benchmark and stress test 
Easy to use and zero configuration embedded benchmark/stress test.
 2020-10-14 19:45:05 +02:00
xmrig
581d004568
Merge pull request #1890 from SChernykh/dev 
Added argon2/chukwav2 algorithm
 2020-10-13 14:54:34 +07:00
SChernykh
4f7186cb0e Added argon2/chukwav2 algorithm 
New Turtlecoin algorithm. Source: https://github.com/turtlecoin/turtlecoin/blob/development/src/crypto/hash.h#L57
 2020-10-12 08:26:57 +02:00
cohcho
4a74ce3242 CPU: use raw counter 2020-10-10 13:28:14 +00:00
SChernykh
3fbf2ac3d4 More precise hashrate calculation 
- Use only steady timestamp counters to guarantee correctness
- CPU backend: directly measure total hashrate using raw hash counters from each thread; update data more often on ARM CPUs because they're slower
- GPU backends: directly measure total hashrate too, but use interpolator with 4 second lag to fix variance from batches of hashes

Total hashrate is now measured directly (realtime for CPU, 4 seconds lag for GPU), so it might differ a bit from the sum of all thread hashrates because data points are taken at different moments in time.

Overhead is reduced a lot since it doesn't have to go through all threads to calculate max total hashrate on every timer tick (2 times a second).
 2020-10-10 11:18:01 +02:00
xmrig
1289942567
Merge pull request #1876 from SChernykh/dev 
RandomX: added `huge-pages-jit` config parameter
 2020-10-07 22:48:57 +07:00
SChernykh
44dcded866 RandomX: added huge-pages-jit config parameter 
Set to false by default, gives 0.2% boost on Ryzen 7 3700X with 16 threads, but hashrate might be unstable on Ryzen between launches. Use with caution.
 2020-10-07 17:42:55 +02:00
cohcho
a705ab775b RandomX: align args 
tempHash/output must be 16-byte aligned for randomx_calculate_hash{,_first,_next}
 2020-10-07 14:47:18 +00:00
SChernykh
c7476e076b RandomX refactoring, moved more stuff to compile time 
Small x86 JIT compiler speedup.
 2020-09-18 20:51:25 +02:00
SChernykh
4a9db89527 RandomX: added SSE4.1-optimized Blake2b 
+0.15% on `rx/0`
+0.3% on `rx/wow`
 2020-09-10 14:28:40 +02:00
XMRig
206b675892
Always use all available threads on ARM. 2020-08-16 17:36:38 +07:00
XMRig
cac48cdd27
Added ARM CPU name detection based on lscpu code. 2020-08-16 15:47:29 +07:00
SChernykh
abb78302b8 Try to allocate scratchpad from dataset's 1 GB huge pages, if normal huge pages are not available 2020-07-31 13:37:22 +02:00
XMRig
1acd88ed39
Cleanup 2020-07-22 21:27:40 +07:00
SChernykh
c83429c55c RandomX: added cache QoS support 
False by default. If set to true, all non-mining CPU cores will not have access to L3 cache.
 2020-07-13 17:23:18 +02:00
XMRig
16863763d3
#1742 Fixed crash when use HTTP API. 2020-06-23 16:17:06 +07:00
SChernykh
dc0aee1432 KawPow: fixed crash on old CPUs 
- Use `popcnt` instruction only when it's supported
 2020-06-10 21:49:43 +02:00
XMRig
69a6111a4f
Merge branch 'dev' into evo 2020-06-10 00:58:29 +07:00
SChernykh
2d2f3d4eb2 Fixed detection of AVX2/AVX512 2020-06-09 17:47:23 +02:00
SChernykh
7f00cb59d2 Conceal (CCX) support 2020-06-07 01:01:45 +02:00
XMRig
7a3233ab4b
Use long tags. 2020-05-28 20:32:41 +07:00
SChernykh
22b937cc1c KawPow WIP 2020-05-27 16:19:57 +02:00
XMRig
3cbf0dc0ee
Removed code duplicate. 2020-05-09 01:13:46 +07:00
XMRig
85af4e27ec
Fix ARM build. 2020-05-08 23:42:53 +07:00
XMRig
a7caf4cc66
Fix build. 2020-05-08 23:05:44 +07:00
XMRig
628506e266
ICpuInfo refactoring. 2020-05-08 22:25:13 +07:00
SChernykh
80d944bf82 Optimized RandomX dataset initialization 
- Use single Argon2 implemenation
- Auto-select the fastest Argon2 implementation for RandomX
 2020-05-03 20:44:59 +02:00
XMRig
8aeba61706
Add 3rdparty prefix to all rapidjson includes. 2020-04-29 14:55:04 +07:00
SChernykh
680e4dd865 Fix code style 2020-04-09 14:31:42 +02:00
SChernykh
abb3340cc7 RandomX JIT refactoring 
- Smaller memory footprint
- A bit faster overall
 2020-04-09 14:24:54 +02:00
SChernykh
69cbfd682a Use node number instead of affinity 2020-04-07 18:46:22 +02:00
SChernykh
6ae37a9519 Pooled allocation of RandomX VMs 
+0.5% speedup on Zen2 when the whole L3 cache is used (16 threads on 3700X/3800X, 32 threads on 3950X).
 2020-04-07 18:31:35 +02:00
XMRig
92a258f142
Added command line option --astrobwt-avx2 2020-03-12 00:04:07 +07:00
SChernykh
e22f798085 AVX2 optimized code for AstroBWT 
Added "astrobwt-avx2" parameter in config.json, it's turned off ("false") by default.

4-5% speedup on CPUs with proper AVX2 support (AMD Ryzen starting with Zen2, Intel Core starting with Haswell).

There will be no speedup on the following CPUs:

- Intel Pentium/Celeron don't support AVX2
- AMD Zen/Zen+ have only half-speed AVX

GCC compiled version is faster without AVX2, MSVC compiled version is faster with AVX2
 2020-03-10 22:35:14 +01:00
XMRig
16a83a9f61
Move files. 2020-03-09 01:22:34 +07:00
XMRig
6cb27e9662
Added command line option --astrobwt-max-size 2020-03-08 00:13:47 +07:00
XMRig
1f36ea2a8e
Added "coin": "keva" and post PR cleanup. 2020-03-07 20:38:44 +07:00
XMRig
ab90af37b3
Merge branch 'master' of https://github.com/kevacoin-project/xmrig into feature-rx-keva 2020-03-07 17:13:08 +07:00
XMRig
4a5493e12f
Added the wizard suggestion. 2020-03-07 03:24:35 +07:00
XMRig
6a45d5dcc9
Update year. 2020-03-06 12:57:21 +07:00
SChernykh
eeadea53e2 AstroBWT 20-50% speedup 
Skips hashes with large stage 2 size. Added configurable `astrobwt-max-size` parameter, default value is 550, min 400, max 1200, optimal value ranges from 500 to 600 depending on CPU.

- Intel CPUs get 20-25% speedup
- 1st- and 2nd-gen Ryzens get 30% speedup
- 3rd-gen Ryzens get up to 50% speedup
 2020-03-05 12:20:21 +01:00
kevacoin
0528ccd01e Added Keva. 2020-03-04 16:23:33 -08:00
SChernykh
14ef99ca67 AstroBWT algorithm (DERO) support 
To test:

- Download https://github.com/deroproject/derosuite/releases/tag/AstroBWT
- Run daemon with `--testnet` in command line

In config.json:
- "coin":"dero"
- "url":"127.0.0.1:30306"
- "daemon:"true"
 2020-02-29 22:41:24 +01:00
XMRig
2f27d5d108
Added printHealth to IBackend interface. 2020-02-14 01:11:53 +07:00
XMRig
c307433900
Fixed nicehash nonce overflow for CPU backend. 2020-02-06 17:19:08 +07:00
XMRig
030d6e5962
Update year. 2020-02-01 20:24:00 +07:00
SChernykh
4571899664 Removed MSR mod for Bulldozer 
It turned out to be useless: https://www.reddit.com/r/MoneroMining/comments/et7s7w/psa_amd_opteronfxa6a8a10_owners_needed_to_test/
 2020-01-27 09:39:39 +01:00
SChernykh
d342968211 Added support for BMI2 instructions 2020-01-21 19:44:56 +01:00
SChernykh
665e43fecc MSR preset for Bulldozer CPUs 
Also fixed verbose output for MSR presets with masks.
 2020-01-14 19:27:34 +01:00
XMRig
402c44b547
Added "cn-pico/tlo". 2019-12-29 00:29:19 +07:00
XMRig
8bef964f68
Added support for write custom MSR. 2019-12-17 02:27:07 +07:00
XMRig
3b4b230cab
Added CPU vendor enum. 2019-12-10 12:49:42 +07:00
XMRig
3edaebb4cf
Move "1gb-pages" option to "randomx" object. 2019-12-09 21:42:40 +07:00
XMRig
d32df84ca5
Memory allocation refactoring. 2019-12-08 23:17:39 +07:00
SChernykh
d0df824599 Optimized dataset read for Ryzen CPUs 
Removed register dependency in dataset read, +0.8% speedup on average.
 2019-12-08 16:14:02 +01:00
XMRig
8ef3e2ec14
Fixed build without hwloc. 2019-12-08 10:20:23 +07:00
XMRig
e9e747f0d1
#1385 "max-threads-hint" option now also limit RandomX dataset initialization threads. 2019-12-07 22:18:06 +07:00
SChernykh
aa3dc75434 Fix ARM compilation 2019-12-06 13:43:59 +01:00
SChernykh
1fbbae1e4a Added 1GB hugepages support for Linux 2019-12-05 19:39:47 +01:00
XMRig
901f1a7ab1
Option "yield" enabled by default and added command line option --cpu-no-yield. 2019-12-04 08:50:54 +07:00
XMRig
c3fd5835c3
Added CPU option "yield". 2019-12-03 09:04:20 +07:00
SChernykh
84d7eb05f3 RandomX fixes 
Intel JCC erratum fix and various other improvements, see more here: https://www.phoronix.com/scan.php?page=article&item=intel-jcc-microcode&num=1
 2019-12-01 08:46:35 +01:00
XMRig
1cb4d73fe3 Added manual (e key) health reports. 2019-11-01 00:09:28 +07:00
XMRig
3bdf7111ce Fixed singular form for threads. 2019-10-29 17:18:46 +07:00
XMRig
23ebcfb2db Display backend for shares. 2019-10-29 15:43:13 +07:00
XMRig
228f02c361 Fixed regression. 2019-10-11 23:21:02 +07:00
XMRig
61ab47cc95 Improved CPU profile generation. 2019-10-09 12:58:11 +07:00
XMRig
9dce868fb9 Added "memory-pool" option. 2019-10-07 23:38:01 +07:00
XMRig
0e0a26f644 Fixed Linux build. 2019-10-07 13:37:12 +07:00
XMRig
68d77b02d7 Added initial memory pool support. 2019-10-07 12:36:40 +07:00
XMRig
d5af5cf8f8 Fixed exit. 2019-10-05 11:24:22 +07:00
XMRig
05928ccc25 Implemented RxNUMAStorage. 2019-10-05 08:24:28 +07:00
XMRig
207dae418d Added RxNUMAStorage stub. 2019-10-04 18:43:03 +07:00
XMRig
7508411faf Extended "numa" option for RandomX. 2019-10-04 10:49:55 +07:00
XMRig
34468782cd Merge branch 'dev' into evo 2019-10-01 07:26:18 +07:00
XMRig
3badeb56a0 Fixed support for systems where total count of NUMA nodes not equal usable count. 2019-10-01 07:19:13 +07:00
XMRig
66e48ed2d7 Fixed ARM build. 2019-09-28 23:26:03 +07:00
XMRig
7c463849cc Added config option "cpu/max-threads-hint" and command line option "--cpu-max-threads-hint". 2019-09-28 02:02:20 +07:00
XMRig
637301d340 Improved/restructured --help output. 2019-09-23 03:47:40 +07:00
XMRig
40e8bfe443 Added global backends hashrate to "GET /2/backends" endpoint. 2019-09-20 14:15:35 +07:00
XMRig
e3fcb99d84 Allow partially started threads. 2019-09-17 02:22:59 +07:00
XMRig
2a107cc463 Improved thread self test error message. 2019-09-16 01:27:51 +07:00
XMRig
95daab4bc0 Implemented VM mode for OpenCL RandomX. 2019-09-12 00:01:03 +07:00
XMRig
4c90f9960e OpenCL RandomX WIP 2019-09-11 15:48:02 +07:00
XMRig
1ad30d50a6 Define double OpenCL threads in simple way. 2019-09-05 09:27:29 +07:00
XMRig
235cda1051 * Restored all cn/1 based algorithms (cn/1, cn-lite/1, cn/rto, cn-heavy/tube) 2019-09-02 18:30:13 +07:00
XMRig
eef5d91606 Implemented verification on CPU. 2019-09-01 19:31:25 +07:00